From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Hans Zhang <18255117159@163.com>
Cc: Siddharth Vadapalli <s-vadapalli@ti.com>,
lpieralisi@kernel.org, kw@linux.com, robh@kernel.org,
bhelgaas@google.com, thomas.richard@bootlin.com,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
rockswang7@gmail.com
Subject: Re: [PATCH] PCI: cadence: Fixed cdns_pcie_host_link_setup return value.
Date: Fri, 20 Dec 2024 18:02:16 +0530 [thread overview]
Message-ID: <20241220123216.za6kzma4q2kyfhln@thinkpad> (raw)
In-Reply-To: <44c74561-a4db-4550-a07e-67f51556dd03@163.com>
On Fri, Dec 20, 2024 at 03:27:22PM +0800, Hans Zhang wrote:
>
>
> On 12/19/24 08:35, Manivannan Sadhasivam wrote:
>
> > > We have 5 PCIe controllers, and if a few of them are not connected to the
> > > device. And it will affect the boot time.
> > >
> >
> > Why are you enabling all controllers? Can't you just enable the ones you know
> > the endpoints are going to be connected? I'm just trying to see if we can avoid
> > having a quirk.
>
> Our SOC has a PC product situation, and there may be PCIe slots on the PCB,
> but the device may not be plugged in. So we need to enable all ports.
>
Since you are trying to fail probe for the unused slots, your hardware is not
supporting hotplug as well I hope.
> > If you do not know, then you need to introduce a quirk for your platform.
> > But that requires your controller driver to be upstreamed. We cannot provide
> > hooks for downstream drivers in upstream.
>
> Our controller driver currently has no plans for upstream and needs to wait
> for notification from the boss.
>
Then the quirk patch has to wait until your driver is submitted upstream.
- Mani
--
மணிவண்ணன் சதாசிவம்
next prev parent reply other threads:[~2024-12-20 12:32 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-19 8:14 Hans Zhang
2024-12-19 8:33 ` Siddharth Vadapalli
2024-12-19 8:49 ` Hans Zhang
2024-12-19 8:59 ` Siddharth Vadapalli
[not found] ` <f2c8be62-7ff6-f0d0-f34a-ddb6915df0a4@163.com>
2024-12-19 9:49 ` Manivannan Sadhasivam
2024-12-19 10:29 ` Hans Zhang
2024-12-19 11:20 ` Manivannan Sadhasivam
2024-12-19 11:46 ` Hans Zhang
2024-12-19 13:35 ` Manivannan Sadhasivam
2024-12-20 7:27 ` Hans Zhang
2024-12-20 12:32 ` Manivannan Sadhasivam [this message]
2024-12-21 14:47 ` Hans Zhang
2024-12-19 10:04 ` Hans Zhang
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