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[31.30.173.28]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a1c833280sm11914043f8f.40.2024.12.23.09.07.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Dec 2024 09:07:27 -0800 (PST) Date: Mon, 23 Dec 2024 18:07:26 +0100 From: Andrew Jones To: Anup Patel Cc: guoren@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, bjorn@rivosinc.com, conor@kernel.org, leobras@redhat.com, peterz@infradead.org, parri.andrea@gmail.com, will@kernel.org, longman@redhat.com, boqun.feng@gmail.com, arnd@arndb.de, alexghiti@rivosinc.com, rkrcmar@ventanamicro.com, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Guo Ren Subject: Re: [PATCH 0/3] riscv: Add PARAVIRT_SPINLOCKS support Message-ID: <20241223-165e7b7ee58e2dede8bfd830@orel> References: <20241222033917.1754495-1-guoren@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Mon, Dec 23, 2024 at 01:44:50PM +0530, Anup Patel wrote: > On Sun, Dec 22, 2024 at 9:09 AM wrote: > > > > From: Guo Ren > > > > Paravirtualized spinlocks allow a unfair qspinlock to replace the > > ticket-lock or native fair qspinlock implementation with something > > virtualization-friendly, for example, halt the virtual CPU rather > > than spinning. > > > > You could observe the paravirt qspinlock internal work situation with > > /sys/kernel/debug/tracing/trace: > > > > ls /sys/kernel/debug/tracing/events/paravirt/ > > enable filter pv_kick pv_wait > > > > echo 1 > /sys/kernel/debug/tracing/events/paravirt/enable > > cat /sys/kernel/debug/tracing/trace > > entries-in-buffer/entries-written: 33927/33927 #P:12 > > > > _-----=> irqs-off/BH-disabled > > / _----=> need-resched > > | / _---=> hardirq/softirq > > || / _--=> preempt-depth > > ||| / _-=> migrate-disable > > |||| / delay > > TASK-PID CPU# ||||| TIMESTAMP FUNCTION > > | | | ||||| | | > > sh-100 [001] d..2. 28.312294: pv_wait: cpu 1 out of wfi > > -0 [000] d.h4. 28.322030: pv_kick: cpu 0 kick target cpu 1 > > sh-100 [001] d..2. 30.982631: pv_wait: cpu 1 out of wfi > > -0 [000] d.h4. 30.993289: pv_kick: cpu 0 kick target cpu 1 > > sh-100 [002] d..2. 44.987573: pv_wait: cpu 2 out of wfi > > -0 [000] d.h4. 44.989000: pv_kick: cpu 0 kick target cpu 2 > > -0 [003] d.s3. 51.593978: pv_kick: cpu 3 kick target cpu 4 > > rcu_sched-15 [004] d..2. 51.595192: pv_wait: cpu 4 out of wfi > > lock_torture_wr-115 [004] ...2. 52.656482: pv_kick: cpu 4 kick target cpu 2 > > lock_torture_wr-113 [002] d..2. 52.659146: pv_wait: cpu 2 out of wfi > > lock_torture_wr-114 [008] d..2. 52.659507: pv_wait: cpu 8 out of wfi > > lock_torture_wr-114 [008] d..2. 52.663503: pv_wait: cpu 8 out of wfi > > lock_torture_wr-113 [002] ...2. 52.666128: pv_kick: cpu 2 kick target cpu 8 > > lock_torture_wr-114 [008] d..2. 52.667261: pv_wait: cpu 8 out of wfi > > lock_torture_wr-114 [009] .n.2. 53.141515: pv_kick: cpu 9 kick target cpu 11 > > lock_torture_wr-113 [002] d..2. 53.143339: pv_wait: cpu 2 out of wfi > > lock_torture_wr-116 [007] d..2. 53.143412: pv_wait: cpu 7 out of wfi > > lock_torture_wr-118 [000] d..2. 53.143457: pv_wait: cpu 0 out of wfi > > lock_torture_wr-115 [008] d..2. 53.143481: pv_wait: cpu 8 out of wfi > > lock_torture_wr-117 [011] d..2. 53.143522: pv_wait: cpu 11 out of wfi > > lock_torture_wr-117 [011] ...2. 53.143987: pv_kick: cpu 11 kick target cpu 8 > > lock_torture_wr-115 [008] ...2. 53.144269: pv_kick: cpu 8 kick target cpu 7 > > > > This series is split from [1]. > > > > [1]: https://lore.kernel.org/linux-riscv/20231225125847.2778638-1-guoren@kernel.org/ > > > > Guo Ren (3): > > RISC-V: paravirt: Add pvqspinlock KVM backend > > RISC-V: paravirt: Add pvqspinlock frontend > > RISC-V: paravirt: pvqspinlock: Add trace point for pv_kick/wait > > This should be an RFC series until the corresponding SBI extension > is frozen. AFAIK, no one has posted any SBI extension in this context > on any of the RVI mailing lists. > > Please work with the PRS TG and Hypervisors SIG for the proposed > SBI extension. > I promised Guo I'd help out by writing a draft for the SBI extension. I'll try to get something posted this week. Thanks, drew