From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from shelob.surriel.com (shelob.surriel.com [96.67.55.147]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 78A7584FAD for ; Mon, 30 Dec 2024 18:05:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=96.67.55.147 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735581944; cv=none; b=qcp2CRIVKZ0S6O3Z8I9RYi2BoJIG7hrwJKywOg+UwNG1ZtD+ZjE12UrP4uGmsjHH8up3avn4kxOfvEryqv2aQYOJgLtzYYHWIiT1W1VMNIzIMl5gt4VbzlPDdvulWY7A7FstULHfS/GNP6pyDR9NbOhGT13i9T7nrdkSzqhYUFE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735581944; c=relaxed/simple; bh=JcUJpjUjKvOPZnatAuhHXyFRxyGK2hiNApeectzzoWU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sJzXFcctFUoMDHlQKwCcck7SPbTRSyZf5zD2uosaapl1QolAntqwPstAqEC4LkYbyTqJXWJGsFqKoN+ggExSXMdd8w1u/MM9DGHA7Gbzart2rPQfOWRxGOtPMyZABMpCCMZWHuYpZr/OZlCG8IRoA/fF2/NjdKR12DZPhMBLNWI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=surriel.com; spf=pass smtp.mailfrom=shelob.surriel.com; arc=none smtp.client-ip=96.67.55.147 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=surriel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=shelob.surriel.com Received: from fangorn.home.surriel.com ([10.0.13.7]) by shelob.surriel.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.97.1) (envelope-from ) id 1tSJzd-000000008Lf-0g30; Mon, 30 Dec 2024 12:55:53 -0500 From: Rik van Riel To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, kernel-team@meta.com, dave.hansen@linux.intel.com, luto@kernel.org, peterz@infradead.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, hpa@zytor.com, akpm@linux-foundation.org, nadav.amit@gmail.com, zhengqi.arch@bytedance.com, linux-mm@kvack.org, Rik van Riel Subject: [PATCH 04/12] x86/mm: get INVLPGB count max from CPUID Date: Mon, 30 Dec 2024 12:53:05 -0500 Message-ID: <20241230175550.4046587-5-riel@surriel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241230175550.4046587-1-riel@surriel.com> References: <20241230175550.4046587-1-riel@surriel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: riel@surriel.com The CPU advertises the maximum number of pages that can be shot down with one INVLPGB instruction in the CPUID data. Save that information for later use. Signed-off-by: Rik van Riel --- arch/x86/include/asm/tlbflush.h | 1 + arch/x86/kernel/cpu/amd.c | 8 ++++++++ arch/x86/kernel/setup.c | 4 ++++ 3 files changed, 13 insertions(+) diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h index 02fc2aa06e9e..7d1468a3967b 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h @@ -182,6 +182,7 @@ static inline void cr4_init_shadow(void) extern unsigned long mmu_cr4_features; extern u32 *trampoline_cr4_features; +extern u16 invlpgb_count_max; extern void initialize_tlbstate_and_flush(void); diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 79d2e17f6582..226b8fc64bfc 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -1135,6 +1135,14 @@ static void cpu_detect_tlb_amd(struct cpuinfo_x86 *c) tlb_lli_2m[ENTRIES] = eax & mask; tlb_lli_4m[ENTRIES] = tlb_lli_2m[ENTRIES] >> 1; + + if (c->extended_cpuid_level < 0x80000008) + return; + + cpuid(0x80000008, &eax, &ebx, &ecx, &edx); + + /* Max number of pages INVLPGB can invalidate in one shot */ + invlpgb_count_max = (edx & 0xffff) + 1; } static const struct cpu_dev amd_cpu_dev = { diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index f1fea506e20f..6c4d08f8f7b1 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -138,6 +138,10 @@ __visible unsigned long mmu_cr4_features __ro_after_init; __visible unsigned long mmu_cr4_features __ro_after_init = X86_CR4_PAE; #endif +#ifdef CONFIG_CPU_SUP_AMD +u16 invlpgb_count_max __ro_after_init; +#endif + #ifdef CONFIG_IMA static phys_addr_t ima_kexec_buffer_phys; static size_t ima_kexec_buffer_size; -- 2.47.1