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([94.131.202.183]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a1c84705esm46031925f8f.44.2025.01.05.08.03.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 05 Jan 2025 08:03:51 -0800 (PST) From: Ivaylo Ivanov To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sam Protsenko , Peter Griffin Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/4] dt-bindings: soc: samsung: usi: add USIv1 and samsung,exynos8895-usi Date: Sun, 5 Jan 2025 18:03:44 +0200 Message-ID: <20250105160346.418829-3-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250105160346.418829-1-ivo.ivanov.ivanov1@gmail.com> References: <20250105160346.418829-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add new constants for choosing the additional USIv1 configuration modes in device tree. Those are further used in the USI driver to figure out which value to write into SW_CONF register. Modify the current USI IP-core bindings to include information about USIv1 and a compatible for exynos8895. Signed-off-by: Ivaylo Ivanov --- .../bindings/soc/samsung/exynos-usi.yaml | 107 ++++++++++++------ include/dt-bindings/soc/samsung,exynos-usi.h | 3 + 2 files changed, 74 insertions(+), 36 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml index cc92a06a3..d6c39c3e3 100644 --- a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml @@ -11,11 +11,21 @@ maintainers: - Krzysztof Kozlowski description: | - USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C). - USI shares almost all internal circuits within each protocol, so only one - protocol can be chosen at a time. USI is modeled as a node with zero or more - child nodes, each representing a serial sub-node device. The mode setting - selects which particular function will be used. + The USI IP-core provides configurable support for serial protocols, enabling + different serial communication modes depending on the version. + + In USIv1, configurations are available to enable either one or two protocols + simultaneously in select combinations - High-Speed I2C0, High-Speed + I2C1, SPI, UART, High-Speed I2C0 and I2C1 or both High-Speed + I2C1 and UART. + + In USIv2, only one protocol can be active at a time, either UART, SPI, or + High-Speed I2C. + + The USI core shares internal circuits across protocols, meaning only the + selected configuration is active at any given time. USI is modeled as a node + with zero or more child nodes, each representing a serial sub-node device. The + mode setting selects which particular function will be used. properties: $nodename: @@ -64,7 +74,7 @@ properties: samsung,mode: $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1, 2, 3] + enum: [0, 1, 2, 3, 4, 5, 6] description: Selects USI function (which serial protocol to use). Refer to for valid USI mode values. @@ -101,37 +111,62 @@ required: - samsung,sysreg - samsung,mode -if: - properties: - compatible: - contains: - enum: - - samsung,exynos850-usi +allOf: + - if: + properties: + compatible: + contains: + enum: + - google,gs101-usi + - samsung,exynos850-usi + - samsung,exynosautov9-usi + - samsung,exynosautov920-usi + + then: + properties: + reg: + maxItems: 1 + + clocks: + items: + - description: Bus (APB) clock + - description: Operating clock for UART/SPI/I2C protocol + + clock-names: + maxItems: 2 + + samsung,mode: + enum: [0, 1, 2, 3] + + required: + - reg + - clocks + - clock-names + + - if: + properties: + compatible: + contains: + enum: + - samsung,exynos8895-usi + + then: + properties: + reg: false + + clocks: + items: + - description: Bus (APB) clock + - description: Operating clock for UART/SPI protocol + + clock-names: + maxItems: 2 + + samsung,clkreq-on: false -then: - properties: - reg: - maxItems: 1 - - clocks: - items: - - description: Bus (APB) clock - - description: Operating clock for UART/SPI/I2C protocol - - clock-names: - maxItems: 2 - - required: - - reg - - clocks - - clock-names - -else: - properties: - reg: false - clocks: false - clock-names: false - samsung,clkreq-on: false + required: + - clocks + - clock-names additionalProperties: false diff --git a/include/dt-bindings/soc/samsung,exynos-usi.h b/include/dt-bindings/soc/samsung,exynos-usi.h index b7c1406f3..aab28176c 100644 --- a/include/dt-bindings/soc/samsung,exynos-usi.h +++ b/include/dt-bindings/soc/samsung,exynos-usi.h @@ -13,5 +13,8 @@ #define USI_MODE_UART 1 #define USI_MODE_SPI 2 #define USI_MODE_I2C 3 +#define USI_MODE_I2C1 4 +#define USI_MODE_I2C0_1 5 +#define USI_MODE_UART_I2C1 6 #endif /* __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H */ -- 2.43.0