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([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id d9443c01a7336-219dc9650bcsm292678655ad.39.2025.01.06.04.28.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Jan 2025 04:28:22 -0800 (PST) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nick Chan Subject: [PATCH v7 00/11] Add PMGR nodes for Apple A7-A11, T2 SoCs Date: Mon, 6 Jan 2025 20:26:17 +0800 Message-ID: <20250106122805.31688-1-towinchenmi@gmail.com> X-Mailer: git-send-email 2.47.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This series adds the PMGR nodes and all known power state subnodes for Apple A7-A11 SoCs, along with the associated dt-bindings. Dependencies: - Split s8000/s8003 SoC DTS files https://lore.kernel.org/asahi/20241222172735.145764-1-towinchenmi@gmail.com/T - Device Tree for Apple T2 (T8012) devices. https://lore.kernel.org/asahi/20241222173240.147675-2-towinchenmi@gmail.com/T Changes since v6: - Now arch/arm64/boot/dts/apple/s800-0-3.dtsi builds, somehow this went under the radar this whole time... a bad merge after the bad rebase made this not noticed earlier. Link to v6: https://lore.kernel.org/asahi/20241222173750.148071-2-towinchenmi@gmail.com/T Changes since v5: - Rebase the series such that splitting s8000/s8003 device trees is the first patch to be applied. Now this series depends on Apple A9 device tree being split, and the T2 SoC PMGR nodes are added in this series. Link to v5: https://lore.kernel.org/asahi/20241203050640.109378-1-towinchenmi@gmail.com/T Changes since v4: - Use imperative mood in commit messages. Link to v4: https://lore.kernel.org/asahi/20241201161942.36027-1-towinchenmi@gmail.com/T Changes since v3: - Add "apple,always-on" property to "ps_spmi" in t8015 power domains. This is required for cpufreq to function correctly which will be added in a later series. Link to v3: https://lore.kernel.org/asahi/20241122095136.35046-1-towinchenmi@gmail.com/T Changes since v2: - Removed "apple,always-on" property from "ps_pmp" from s8001, t8011, t8015 power domains. It is not on at boot. (Mixed up with ps_pms which is required to be on) - Add asahi-soc/dt back into the subject prefix, missing from v2. Link to v2: https://lore.kernel.org/asahi/20241102011004.59339-1-towinchenmi@gmail.com/T Changes since v1: - Removed "framebuffer0" dt aliases. It is not standard and not needed. Link to v1: https://lore.kernel.org/asahi/20241029010526.42052-1-towinchenmi@gmail.com/T Nick Chan --- Nick Chan (11): dt-bindings: arm: apple: apple,pmgr: Add A7-A11, T2 compatibles dt-bindings: arm: apple: apple,pmgr-pwrstate: Add A7-A11, T2 compatibles arm64: dts: apple: s5l8960x: Add PMGR node arm64: dts: apple: t7000: Add PMGR node arm64: dts: apple: t7001: Add PMGR node arm64: dts: apple: s800-0-3: Add PMGR nodes arm64: dts: apple: s8001: Add PMGR nodes arm64: dts: apple: t8010: Add PMGR nodes arm64: dts: apple: t8011: Add PMGR nodes arm64: dts: apple: t8012: Add PMGR nodes arm64: dts: apple: t8015: Add PMGR nodes .../bindings/arm/apple/apple,pmgr.yaml | 5 + .../bindings/power/apple,pmgr-pwrstate.yaml | 5 + arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi | 4 + arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi | 4 + arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi | 4 + arch/arm64/boot/dts/apple/s5l8960x-pmgr.dtsi | 610 ++++++++++++ arch/arm64/boot/dts/apple/s5l8960x.dtsi | 13 + arch/arm64/boot/dts/apple/s800-0-3-pmgr.dtsi | 757 ++++++++++++++ arch/arm64/boot/dts/apple/s800-0-3.dtsi | 22 + arch/arm64/boot/dts/apple/s8001-common.dtsi | 1 + .../arm64/boot/dts/apple/s8001-j98a-j99a.dtsi | 26 + arch/arm64/boot/dts/apple/s8001-j98a.dts | 1 + arch/arm64/boot/dts/apple/s8001-j99a.dts | 1 + arch/arm64/boot/dts/apple/s8001-pmgr.dtsi | 822 ++++++++++++++++ arch/arm64/boot/dts/apple/s8001.dtsi | 22 + arch/arm64/boot/dts/apple/s800x-6s.dtsi | 4 + arch/arm64/boot/dts/apple/s800x-ipad5.dtsi | 4 + arch/arm64/boot/dts/apple/s800x-se.dtsi | 4 + arch/arm64/boot/dts/apple/t7000-6.dtsi | 4 + arch/arm64/boot/dts/apple/t7000-j42d.dts | 1 + arch/arm64/boot/dts/apple/t7000-mini4.dtsi | 4 + arch/arm64/boot/dts/apple/t7000-n102.dts | 4 + arch/arm64/boot/dts/apple/t7000-pmgr.dtsi | 641 ++++++++++++ arch/arm64/boot/dts/apple/t7000.dtsi | 14 + arch/arm64/boot/dts/apple/t7001-air2.dtsi | 1 + arch/arm64/boot/dts/apple/t7001-pmgr.dtsi | 650 ++++++++++++ arch/arm64/boot/dts/apple/t7001.dtsi | 13 + arch/arm64/boot/dts/apple/t8010-7.dtsi | 4 + arch/arm64/boot/dts/apple/t8010-ipad6.dtsi | 4 + arch/arm64/boot/dts/apple/t8010-n112.dts | 4 + arch/arm64/boot/dts/apple/t8010-pmgr.dtsi | 772 +++++++++++++++ arch/arm64/boot/dts/apple/t8010.dtsi | 22 + arch/arm64/boot/dts/apple/t8011-common.dtsi | 1 + arch/arm64/boot/dts/apple/t8011-pmgr.dtsi | 806 +++++++++++++++ arch/arm64/boot/dts/apple/t8011-pro2.dtsi | 8 + arch/arm64/boot/dts/apple/t8011.dtsi | 22 + arch/arm64/boot/dts/apple/t8012-pmgr.dtsi | 837 ++++++++++++++++ arch/arm64/boot/dts/apple/t8012-touchbar.dtsi | 1 + arch/arm64/boot/dts/apple/t8012.dtsi | 22 + arch/arm64/boot/dts/apple/t8015-common.dtsi | 1 + arch/arm64/boot/dts/apple/t8015-pmgr.dtsi | 931 ++++++++++++++++++ arch/arm64/boot/dts/apple/t8015.dtsi | 21 + 42 files changed, 7097 insertions(+) create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-pmgr.dtsi create mode 100644 arch/arm64/boot/dts/apple/s800-0-3-pmgr.dtsi create mode 100644 arch/arm64/boot/dts/apple/s8001-j98a-j99a.dtsi create mode 100644 arch/arm64/boot/dts/apple/s8001-pmgr.dtsi create mode 100644 arch/arm64/boot/dts/apple/t7000-pmgr.dtsi create mode 100644 arch/arm64/boot/dts/apple/t7001-pmgr.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8010-pmgr.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8011-pmgr.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8012-pmgr.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8015-pmgr.dtsi base-commit: 657dda2ef61e9b9e7107b672a0c49d2c594508c9 -- 2.47.1