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[34.125.135.129]) by smtp.gmail.com with UTF8SMTPSA id 98e67ed59e1d1-2f54a2d43dcsm225080a91.38.2025.01.07.17.28.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 07 Jan 2025 17:28:48 -0800 (PST) From: Stephen Boyd To: Bjorn Andersson , Konrad Dybcio Cc: linux-kernel@vger.kernel.org, patches@lists.linux.dev, devicetree@vger.kernel.org, Dmitry Baryshkov , Krzysztof Kozlowski , Rob Herring , linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Arnd Bergmann , Conor Dooley , Saravana Kannan , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Subject: [RFC PATCH 0/6] qcom: Add an SoC PM driver for sc7180 using PM domains Date: Tue, 7 Jan 2025 17:28:37 -0800 Message-ID: <20250108012846.3275443-1-swboyd@chromium.org> X-Mailer: git-send-email 2.47.1.613.gc27f4b7a9f-goog Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This series implements an SoC PM driver for Qualcomm's SC7180 SoC that creates devices for the nodes that make up the soc node and attaches PM domains to those devices before the devices are added to the platform bus. The overall plan is to remove power management logic from various platform drivers and consolidate it into this SoC PM driver using PM domains. This series isn't there yet, as I haven't had the time to do much beyond this starting part. This is a followup to my presentation at OSSEU in 2024[1]. I'm sending it out so that the early pieces can land while we work through the PM domain parts which I worry is going to get annoying rather quickly. TODO: * Populate more child devices and attach more pm domains to test out more stuff * Set power state of PM domains to match on/off state of resources like clks, regulators, etc. * Investigate setting runtime PM state of devices before they're added to platform bus * Remove PM code from drivers using the platform_data non-NULL trick * Make multiple domains? Perhaps clk domain, regulator domain, interconnect domain, etc? * Provide a way for runtime active devices out of boot to be powered down when a driver isn't attached [1] https://osseu2024.sched.com/event/1ej38/the-case-for-an-soc-power-management-driver-stephen-boyd-google Stephen Boyd (6): bus: Extract simple-bus into self-contained driver dt-bindings: bus: Add qcom,soc-sc7180 SoC bus: Add basic sc7180 bus driver of: Extract alloc/add functions from of_platform_device_create_pdata() bus: qcom-sc7180: Attach pm domain to watchdog device arm64: dts: qcom: sc7180: Add SoC specific compatible to soc node .../bindings/bus/qcom,soc-sc7180.yaml | 76 ++++++++ arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +- drivers/bus/Kconfig | 26 +++ drivers/bus/Makefile | 6 + drivers/bus/qcom/Kconfig | 16 ++ drivers/bus/qcom/Makefile | 3 + drivers/bus/qcom/qcom-sc7180.c | 173 ++++++++++++++++++ drivers/bus/simple-bus.c | 79 ++++++++ drivers/bus/simple-pm-bus.c | 2 + drivers/of/platform.c | 130 +++++++++++-- include/linux/of_platform.h | 14 ++ 11 files changed, 511 insertions(+), 16 deletions(-) create mode 100644 Documentation/devicetree/bindings/bus/qcom,soc-sc7180.yaml create mode 100644 drivers/bus/qcom/Kconfig create mode 100644 drivers/bus/qcom/Makefile create mode 100644 drivers/bus/qcom/qcom-sc7180.c create mode 100644 drivers/bus/simple-bus.c base-commit: 3c48780d48df029cf9d5f42b8971663e6fb975ae -- https://chromeos.dev