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[34.125.135.129]) by smtp.gmail.com with UTF8SMTPSA id d9443c01a7336-219dc9d4474sm318577745ad.142.2025.01.07.17.28.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 07 Jan 2025 17:28:57 -0800 (PST) From: Stephen Boyd To: Bjorn Andersson , Konrad Dybcio Cc: linux-kernel@vger.kernel.org, patches@lists.linux.dev, devicetree@vger.kernel.org, Dmitry Baryshkov , Krzysztof Kozlowski , Rob Herring , linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Arnd Bergmann , Conor Dooley , Saravana Kannan , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Subject: [RFC PATCH 6/6] arm64: dts: qcom: sc7180: Add SoC specific compatible to soc node Date: Tue, 7 Jan 2025 17:28:43 -0800 Message-ID: <20250108012846.3275443-7-swboyd@chromium.org> X-Mailer: git-send-email 2.47.1.613.gc27f4b7a9f-goog In-Reply-To: <20250108012846.3275443-1-swboyd@chromium.org> References: <20250108012846.3275443-1-swboyd@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Allow an SoC driver to probe for these devices. Add the SoC specific compatible to the soc node. Leave the original simple-bus compatible in place so that everything keeps working. Cc: Rob Herring Cc: Bjorn Andersson Cc: Konrad Dybcio Cc: Signed-off-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 76fe314d2ad5..257890a193e6 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -782,7 +782,7 @@ soc: soc@0 { #size-cells = <2>; ranges = <0 0 0 0 0x10 0>; dma-ranges = <0 0 0 0 0x10 0>; - compatible = "simple-bus"; + compatible = "qcom,soc-sc7180", "simple-bus"; gcc: clock-controller@100000 { compatible = "qcom,gcc-sc7180"; -- https://chromeos.dev