From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E8FDA1FA851 for ; Fri, 17 Jan 2025 09:52:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737107551; cv=none; b=F5rNuDmkX794IOmbptelpx9FXOdLLtsu0TmZfapGJ4+BCnUChrIS3vqFyEa4MC2pm1fC2XQHNPQB+V0plsV00qHBPZqj7mnwron2EgSg6aPsK1kfOHaZpGPJL4QoQ5fpkSNO93AVnP59DANuAURav3Koroo+wbN7/IhPAvGxfgY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737107551; c=relaxed/simple; bh=bu3HDOjmknoFhSK4NgDi0L0jhkjtPUNUiSX2CF7qSRk=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=h2xOi8WmLLgRlNLdKoloppHqQsznVDaX+fOFDacZvM9jPkvS9PlWJvgfAw76z4ZNruWQ9WJVs3RfO4WWU4i/OMyLxMgsEfTBEYnmvqq14imo3QPGz/TolFlXvP3uJpZbXZmqkZLhNWhpg1ftGSIg898+0LrFmDi/QEo2wqQ4VRs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.12; Fri, 17 Jan 2025 17:52:19 +0800 Received: from localhost.localdomain (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1258.12 via Frontend Transport; Fri, 17 Jan 2025 17:52:19 +0800 From: Kevin Chen To: , , , , , CC: Kevin Chen Subject: [PATCH v0 0/3] Add AST2600 LPC PCC support Date: Fri, 17 Jan 2025 17:52:14 +0800 Message-ID: <20250117095217.661070-1-kevin_chen@aspeedtech.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain The AST2600 has PCC controller in LPC, placed in LPC node. As a result, add LPC PCC controller driver to support POST code capture. Kevin Chen (3): dt-binding: aspeed: Add LPC PCC controller ARM: dts: aspeed-g6: Add AST2600 LPC PCC support soc: aspeed: lpc-pcc: Add PCC controller support .../bindings/soc/aspeed/lpc-pcc.yaml | 51 ++ arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 7 + drivers/soc/aspeed/Kconfig | 10 + drivers/soc/aspeed/Makefile | 1 + drivers/soc/aspeed/aspeed-lpc-pcc.c | 505 ++++++++++++++++++ 5 files changed, 574 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/aspeed/lpc-pcc.yaml create mode 100644 drivers/soc/aspeed/aspeed-lpc-pcc.c -- 2.34.1