Re: [PATCH v2] usb: dwc3: Fix timeout issue during controller enter/exit from halt state

[Thinh Nguyen <Thinh.Nguyen@synopsys.com>]

On Sat, Feb 01, 2025, Selvarasu Ganesan wrote:
> There is a frequent timeout during controller enter/exit from halt state
> after toggling the run_stop bit by SW. This timeout occurs when
> performing frequent role switches between host and device, causing
> device enumeration issues due to the timeout. This issue was not present
> when USB2 suspend PHY was disabled by passing the SNPS quirks
> (snps,dis_u2_susphy_quirk and snps,dis_enblslpm_quirk) from the DTS.
> However, there is a requirement to enable USB2 suspend PHY by setting of
> GUSB2PHYCFG.ENBLSLPM and GUSB2PHYCFG.SUSPHY bits when controller starts
> in gadget or host mode results in the timeout issue.
> 
> This commit addresses this timeout issue by ensuring that the bits
> GUSB2PHYCFG.ENBLSLPM and GUSB2PHYCFG.SUSPHY are cleared before starting
> the dwc3_gadget_run_stop sequence and restoring them after the
> dwc3_gadget_run_stop sequence is completed.
> 
> Fixes: 72246da40f37 ("usb: Introduce DesignWare USB3 DRD Driver")
> Cc: stable@vger.kernel.org
> Signed-off-by: Selvarasu Ganesan <selvarasu.g@samsung.com>
> ---
> 
> Changes in v2:
>  - Added some comments before the changes.
>  - And removed "unlikely" in the condition check.
>  - Link to v1: https://urldefense.com/v3/__https://lore.kernel.org/linux-usb/20250131110832.438-1-selvarasu.g@samsung.com/__;!!A4F2R9G_pg!aIY9c56j1jjbSvIIW4zaudkdAGozvtMu-PwjhrMy0_v0FxGBaYhMXS8fTrVTzEOevr8QitekXvuOPKPfDxiHGa93hjI$ 
> ---
>  drivers/usb/dwc3/gadget.c | 34 ++++++++++++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
> 
> diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
> index d27af65eb08a..ddd6b2ce5710 100644
> --- a/drivers/usb/dwc3/gadget.c
> +++ b/drivers/usb/dwc3/gadget.c
> @@ -2629,10 +2629,38 @@ static int dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on)
>  {
>  	u32			reg;
>  	u32			timeout = 2000;
> +	u32			saved_config = 0;
>  
>  	if (pm_runtime_suspended(dwc->dev))
>  		return 0;
>  
> +	/*
> +	 * When operating in USB 2.0 speeds (HS/FS), ensure that
> +	 * GUSB2PHYCFG.ENBLSLPM and GUSB2PHYCFG.SUSPHY are cleared before starting
> +	 * or stopping the controller. This resolves timeout issues that occur
> +	 * during frequent role switches between host and device modes.
> +	 *
> +	 * Save and clear these settings, then restore them after completing the
> +	 * controller start or stop sequence.
> +	 *
> +	 * This solution was discovered through experimentation as it is not
> +	 * mentioned in the dwc3 programming guide. It has been tested on an
> +	 * Exynos platforms.
> +	 */
> +	reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
> +	if (reg & DWC3_GUSB2PHYCFG_SUSPHY) {
> +		saved_config |= DWC3_GUSB2PHYCFG_SUSPHY;
> +		reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
> +	}
> +
> +	if (reg & DWC3_GUSB2PHYCFG_ENBLSLPM) {
> +		saved_config |= DWC3_GUSB2PHYCFG_ENBLSLPM;
> +		reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM;
> +	}
> +
> +	if (saved_config)
> +		dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
> +
>  	reg = dwc3_readl(dwc->regs, DWC3_DCTL);
>  	if (is_on) {
>  		if (DWC3_VER_IS_WITHIN(DWC3, ANY, 187A)) {
> @@ -2660,6 +2688,12 @@ static int dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on)
>  		reg &= DWC3_DSTS_DEVCTRLHLT;
>  	} while (--timeout && !(!is_on ^ !reg));
>  
> +	if (saved_config) {
> +		reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
> +		reg |= saved_config;
> +		dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
> +	}
> +
>  	if (!timeout)
>  		return -ETIMEDOUT;
>  
> -- 
> 2.17.1
> 

Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>

Thanks,
Thinh