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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2025 12:48:44.7313 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6a78aea1-f6a6-487e-580c-08dd4c2cc091 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F69.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8583 The Tegra UTC (UART Trace Controller) is a hardware controller that allows multiple systems within the Tegra SoC to share a hardware UART interface. It supports up to 16 clients, with each client having its own interrupt and a FIFO buffer for both RX (receive) and TX (transmit), each capable of holding 128 characters. The Tegra UTC uses 8-N-1 configuration and operates on a pre-configured baudrate, which is configured by the bootloader. Kartik Rajput (2): dt-bindings: serial: Add bindings for nvidia,tegra264-utc serial: tegra-utc: Add driver for Tegra UART Trace Controller (UTC) .../bindings/serial/nvidia,tegra264-utc.yaml | 73 ++ drivers/tty/serial/Kconfig | 23 + drivers/tty/serial/Makefile | 1 + drivers/tty/serial/tegra-utc.c | 625 ++++++++++++++++++ 4 files changed, 722 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/nvidia,tegra264-utc.yaml create mode 100644 drivers/tty/serial/tegra-utc.c -- 2.43.0