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Wed, 19 Feb 2025 19:59:37 -0800 (PST) From: Dmitry Baryshkov Date: Thu, 20 Feb 2025 05:59:26 +0200 Subject: [PATCH v2 5/5] drm/msm/dpu: enable CDM_0 for X Elite platform Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20250220-dpu-add-cdm-v2-5-77f5f0df3d9a@linaro.org> References: <20250220-dpu-add-cdm-v2-0-77f5f0df3d9a@linaro.org> In-Reply-To: <20250220-dpu-add-cdm-v2-0-77f5f0df3d9a@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=974; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=Q0AAoFwflM5C/JzoUWd/DlT7FRIKp6S0uiQ3bl9uOHU=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBntqiduKMlpqumEmY5OPFLoCuQXyc2gb70SXzyJ mywbLuvK72JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ7aonQAKCRCLPIo+Aiko 1b3MB/wPJEdUn5qcCCIEys0QHQbx0quVb/3EjLjFhCH3MdRYOPBQH1q31C0F4p7f+e+OVF7/QZH xS9SxWgd+TAv9ruf2lZt6fOkC1V+laRCZUz0pQsU0dZPi0DArTjuC8YfZxoWN1oSpHfqwriv5Xg tBS4RgB5isOHZnrA0R6xjA7DTCyKsAqSJPsj7+5I10eTetG/ZJ4EJ+K2gBmxZ2oKshysEgPCunS NQOiT7IognnfI77uzPrw3cTJah8MCWi9ngQp86N3Pm9bBxS19eetcS4UWbDb+hboVDZncBa7rQR aM92Cs9GyUESrpBUh37NHHYmUIJpkiONB88BNUMij4JM4ucZ X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Enable CDM on the X Elite platform, allowing RGB to YUV conversion for the output. Reviewed-by: Abhinav Kumar Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h index 6b112e3d17da6a4423851525262b66aa6c8622e3..8977fa48926b40d486110424f70344c4d29abe80 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h @@ -453,6 +453,7 @@ const struct dpu_mdss_cfg dpu_x1e80100_cfg = { .mdss_ver = &x1e80100_mdss_ver, .caps = &x1e80100_dpu_caps, .mdp = &x1e80100_mdp, + .cdm = &dpu_cdm_5_x, .ctl_count = ARRAY_SIZE(x1e80100_ctl), .ctl = x1e80100_ctl, .sspp_count = ARRAY_SIZE(x1e80100_sspp), -- 2.39.5