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It is annoyed to add device id to the reset-simple driver for each device when coming a new SoC. This patch series introduce a generic binding to collect devices match the following requirement: - There is a single, contiguous range of 32-bit registers. - All bits in each register directly control a reset line. - There are no self-deasserting resets. - There are no timing requirements. - The bits are exclusively resets, nothing else. - All bits behave the same, so all reset bits are either active-high or all are active-low. - The bits can be read back, but the read status may be active-low independently from the writes. If the device follows the requirement, it can set the compatiable and reuse the provided "reset-simple" as base compatiable without changing the reset-simple driver with unnecessary new device id. Add a generic reset-simple controller, and migrate the Sophgo SG2042 reset controller as an example. Change from v1: - https://lore.kernel.org/all/20250213020900.745551-1-inochiama@gmail.com/ 1. fix title to mark it introduce new generic device for reset-simple driver 2. add "active-low" property support for the generic reset-simple device. 3. patch 1: update the binding description to illustrate the suitable scenarios to use this binding. Inochi Amaoto (5): dt-bindings: reset: add generic bit reset controller reset: simple: Add active-low property support. reset: simple: add support generic reset-simple device dt-bindings: reset: simple: migrate sophgo sg2042 reset controller riscv: dts: sg2042: Adapt reset generator for new binding .../bindings/reset/reset-simple.yaml | 66 +++++++++++++++++++ .../bindings/reset/sophgo,sg2042-reset.yaml | 35 ---------- arch/riscv/boot/dts/sophgo/sg2042.dtsi | 3 +- drivers/reset/reset-simple.c | 7 ++ 4 files changed, 75 insertions(+), 36 deletions(-) create mode 100644 Documentation/devicetree/bindings/reset/reset-simple.yaml delete mode 100644 Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml -- 2.48.1