From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DDAE85A4D5; Fri, 28 Feb 2025 01:19:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740705564; cv=none; b=NHYDCpjkQIttSARLI5P4WMUxbkTiK6syvbCMFjhYyDcns4T1jLT4kOwK4Xiq1n6dSSME9XKfZrBP7mwfsae1D5CuTQyZQ0al6yAH2duYqRHMZv3DCiifaMPg+YOc+NCcibCA3ObcFKcBKirDab2gwpQrjw+WKIHK0sRo8vZnzHQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740705564; c=relaxed/simple; bh=nxAZo/OMAzvInHQzAVxo8oOko4quys441uMwzu7wIT8=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=QsMD9sXpV2KKImuL0DPvI3hXr6XDCb4mViqVYySLpqhd2J6OEgyYN6A0cQg01f50J0FuuLL4+gO8er2Xw1FzNGtpN0kYGRiW1mDp3vdIZFP+1e/DYS8VC9I0dKA/HRupFyViEpVtwdkBRrFnH/mlwtabMuheo65S7pBEXC/gy2M= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=JHtjn/D8; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="JHtjn/D8" X-UUID: fed651a8f57111efaae1fd9735fae912-20250228 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=oegyJYedlbzffGL4cDafdK/VAO0ZgOIByVceTitr8z4=; b=JHtjn/D8nhQKsfceIgXXm0AgqcBNdqh7tcnOuQbLVgd91lbPEE9XQ/JJ1EKxqxWJDRKAvdpF3tr337cI1N/EQXzGOHRrBFBGfC35wzuG0eE8RFiFJBf7ef55hYuFldb6nKLE3XCIplP7HrJJsC0QQRz4WavW6KjgpNUSuh+w1Zk=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.46,REQID:ad350bee-1628-4955-94d1-55f7c7f5e8f8,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:60aa074,CLOUDID:9e8f5929-e0f8-414e-b8c3-b75c08217be8,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0|50,EDM:-3,IP:ni l,URL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES :1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: fed651a8f57111efaae1fd9735fae912-20250228 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 2085863763; Fri, 28 Feb 2025 09:19:02 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Fri, 28 Feb 2025 09:19:01 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Fri, 28 Feb 2025 09:19:00 +0800 From: Cathy Xu To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Sean Wang CC: , , , , , Yong Mao , "Axe Yang" , Wenbin Mei , Lei Xue , Cathy Xu Subject: [PATCH v4 0/3] pinctrl: mediatek: Add pinctrl driver on mt8196 Date: Fri, 28 Feb 2025 09:16:24 +0800 Message-ID: <20250228011702.16493-1-ot_cathy.xu@mediatek.com> X-Mailer: git-send-email 2.46.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Changes in v4: - Add rsel-resistence-in-si-unit and remove RSEL macro magic number in mediatek,mt8196-pinctrl.yaml. - Add values in SI units option to |struct mtk_pin_soc| in pinctrl-mt8196.c. - Move pinmux macro header file to arch/arm64/boot/dts/mediatek. Changes in v3: - Remove drive-strength-microamp & rsel-resistence-in-si-unit related description in mediatek,mt8196-pinctrl.yaml. - Use pm_sleep_ptr() in pinctrl-mt8196.c to fix build error. Changes in v2: - Fix driver file's coding style. - Add pinctrl binding document. Cathy Xu (3): dt-bindings: pinctrl: mediatek: Add support for mt8196 arm64: dts: mediatek: mt8196: Add pinmux macro header file pinctrl: mediatek: Add pinctrl driver on mt8196 .../pinctrl/mediatek,mt8196-pinctrl.yaml | 241 ++ arch/arm64/boot/dts/mediatek/mt8196-pinfunc.h | 1572 ++++++++++ drivers/pinctrl/mediatek/Kconfig | 12 + drivers/pinctrl/mediatek/Makefile | 1 + drivers/pinctrl/mediatek/pinctrl-mt8196.c | 1857 +++++++++++ drivers/pinctrl/mediatek/pinctrl-mtk-mt8196.h | 2789 +++++++++++++++++ 6 files changed, 6472 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/mediatek,mt8196-pinctrl.yaml create mode 100644 arch/arm64/boot/dts/mediatek/mt8196-pinfunc.h create mode 100644 drivers/pinctrl/mediatek/pinctrl-mt8196.c create mode 100644 drivers/pinctrl/mediatek/pinctrl-mtk-mt8196.h -- 2.45.2