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Tue, 04 Mar 2025 07:08:44 -0800 (PST) Date: Tue, 4 Mar 2025 20:38:38 +0530 From: Manivannan Sadhasivam To: Jim Quinlan Cc: linux-pci@vger.kernel.org, Nicolas Saenz Julienne , Bjorn Helgaas , Lorenzo Pieralisi , Cyril Brulebois , Stanimir Varbanov , bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com, Florian Fainelli , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" , "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" , open list Subject: Re: [PATCH v2 6/8] PCI: brcmstb: Use same constant table for config space access Message-ID: <20250304150838.23ca5qbhm4yrpa3h@thinkpad> References: <20250214173944.47506-1-james.quinlan@broadcom.com> <20250214173944.47506-7-james.quinlan@broadcom.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250214173944.47506-7-james.quinlan@broadcom.com> On Fri, Feb 14, 2025 at 12:39:34PM -0500, Jim Quinlan wrote: > The constants EXT_CFG_DATA and EXT_CFG_INDEX vary by SOC. One of the > map_bus methods used these constants, the other used different constants. > Fortunately there was no problem because the SoCs that used the latter > map_bus method all had the same register constants. > > Remove the redundant constants and adjust the code to use them. In > addition, update EXT_CFG_DATA to use the 4k-page based config space access > system, which is what the second map_bus method was already using. > What is the effect of this change? Why is it required? Sounds like it got sneaked in. > Signed-off-by: Jim Quinlan > --- > drivers/pci/controller/pcie-brcmstb.c | 14 ++++++-------- > 1 file changed, 6 insertions(+), 8 deletions(-) > > diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c > index e1059e3365bd..923ac1a03f85 100644 > --- a/drivers/pci/controller/pcie-brcmstb.c > +++ b/drivers/pci/controller/pcie-brcmstb.c > @@ -150,9 +150,6 @@ > #define MSI_INT_MASK_SET 0x10 > #define MSI_INT_MASK_CLR 0x14 > > -#define PCIE_EXT_CFG_DATA 0x8000 > -#define PCIE_EXT_CFG_INDEX 0x9000 > - > #define PCIE_RGR1_SW_INIT_1_PERST_MASK 0x1 > #define PCIE_RGR1_SW_INIT_1_PERST_SHIFT 0x0 > > @@ -727,8 +724,8 @@ static void __iomem *brcm_pcie_map_bus(struct pci_bus *bus, > > /* For devices, write to the config space index register */ > idx = PCIE_ECAM_OFFSET(bus->number, devfn, 0); > - writel(idx, pcie->base + PCIE_EXT_CFG_INDEX); > - return base + PCIE_EXT_CFG_DATA + PCIE_ECAM_REG(where); > + writel(idx, base + IDX_ADDR(pcie)); > + return base + DATA_ADDR(pcie) + PCIE_ECAM_REG(where); > } > > static void __iomem *brcm7425_pcie_map_bus(struct pci_bus *bus, > @@ -1711,7 +1708,7 @@ static void brcm_pcie_remove(struct platform_device *pdev) > static const int pcie_offsets[] = { > [RGR1_SW_INIT_1] = 0x9210, > [EXT_CFG_INDEX] = 0x9000, > - [EXT_CFG_DATA] = 0x9004, > + [EXT_CFG_DATA] = 0x8000, > [PCIE_HARD_DEBUG] = 0x4204, > [PCIE_INTR2_CPU_BASE] = 0x4300, > }; > @@ -1719,7 +1716,7 @@ static const int pcie_offsets[] = { > static const int pcie_offsets_bcm7278[] = { > [RGR1_SW_INIT_1] = 0xc010, > [EXT_CFG_INDEX] = 0x9000, > - [EXT_CFG_DATA] = 0x9004, > + [EXT_CFG_DATA] = 0x8000, > [PCIE_HARD_DEBUG] = 0x4204, > [PCIE_INTR2_CPU_BASE] = 0x4300, > }; > @@ -1733,8 +1730,9 @@ static const int pcie_offsets_bcm7425[] = { > }; > > static const int pcie_offsets_bcm7712[] = { > + [RGR1_SW_INIT_1] = 0x9210, > [EXT_CFG_INDEX] = 0x9000, > - [EXT_CFG_DATA] = 0x9004, > + [EXT_CFG_DATA] = 0x8000, > [PCIE_HARD_DEBUG] = 0x4304, > [PCIE_INTR2_CPU_BASE] = 0x4400, > }; > -- > 2.43.0 > -- மணிவண்ணன் சதாசிவம்