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Thu, 06 Mar 2025 03:30:54 -0800 (PST) Received: from localhost.localdomain ([2001:b07:6474:ebbf:4703:aa8c:6eab:8161]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3912bfb79b9sm1749650f8f.3.2025.03.06.03.30.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Mar 2025 03:30:54 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Stephen Boyd , Peng Fan , Abel Vesa , linux-amarula@amarulasolutions.com, Dario Binacchi , Conor Dooley , Fabio Estevam , Krzysztof Kozlowski , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH v10 16/18] arm64: dts: imx8mm: add PLLs to clock controller module (CCM) Date: Thu, 6 Mar 2025 12:28:05 +0100 Message-ID: <20250306112959.242131-17-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250306112959.242131-1-dario.binacchi@amarulasolutions.com> References: <20250306112959.242131-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add the PLLs generated by anatop to the clock list of the Clock Controller Module (CCM) node. Signed-off-by: Dario Binacchi --- (no changes since v4) Changes in v4: - New arch/arm64/boot/dts/freescale/imx8mm.dtsi | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 597041a05073..79f4c1ae7d8b 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -642,9 +642,14 @@ clk: clock-controller@30380000 { ; #clock-cells = <1>; clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>, - <&clk_ext3>, <&clk_ext4>; + <&clk_ext3>, <&clk_ext4>, + <&anatop IMX8MM_ANATOP_AUDIO_PLL1>, + <&anatop IMX8MM_ANATOP_AUDIO_PLL2>, + <&anatop IMX8MM_ANATOP_DRAM_PLL>, + <&anatop IMX8MM_ANATOP_VIDEO_PLL>; clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", - "clk_ext3", "clk_ext4"; + "clk_ext3", "clk_ext4", "audio_pll1", "audio_pll2", + "dram_pll", "video_pll"; assigned-clocks = <&clk IMX8MM_CLK_A53_SRC>, <&clk IMX8MM_CLK_A53_CORE>, <&clk IMX8MM_CLK_NOC>, -- 2.43.0