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Mon, 10 Mar 2025 06:22:29 -0700 (PDT) From: Xu Lu To: akpm@linux-foundation.org, tjeznach@rivosinc.com, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com Cc: lihangjing@bytedance.com, xieyongji@bytedance.com, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Xu Lu Subject: [PATCH v1 0/4] riscv: iommu: Support Svnapot Date: Mon, 10 Mar 2025 21:22:18 +0800 Message-Id: <20250310132222.58378-1-luxu.kernel@bytedance.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit According to the RISC-V IOMMU hardware spec, the IOMMU implementation has the same translation process as MMU and supports Svnapot standard extension as well. These patches add support for Svnapot in the IOMMU driver to make 64K also an available page size during DMA mapping. Xu Lu (4): mm/gup: Handle huge pte for follow_page_pte() iommu/riscv: Use pte_t to represent page table entry iommu/riscv: Introduce IOMMU page table lock iommu/riscv: Add support for Svnapot arch/riscv/include/asm/pgtable.h | 6 + drivers/iommu/riscv/iommu.c | 253 +++++++++++++++++++++++++------ include/linux/pgtable.h | 8 + mm/gup.c | 22 ++- 4 files changed, 235 insertions(+), 54 deletions(-) -- 2.20.1