From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 918DA14F6C; Tue, 11 Mar 2025 12:23:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741695819; cv=none; b=B/O0W8xW9FWKj3bi7hjsuWt+IrsnwW5UtCVObCZIKg57/hc0Q2xsqUX013Iw2EIxVDAwG+b+Nu6Jr954xP8O/NPVuo1vFXeaveyWBPHlytIjuNdqkmzaTJSh2cycrmhO/tJxpWGvjrs9WzQ2n4LEUpG+Sz91I2jHkCz1J3upWZA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741695819; c=relaxed/simple; bh=Yfq9fxaqTwkfCGK1Rfr4JJZR239Bvfw/7A6983p/4FI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=G+NHUR9/FtmQC3sJCjp6dhRkWYbVHQQrUXW2gFzBx4opOKKMtZGx9LuE+1TPaeJWlSkZtD0pkwd5ejvJXZt1/h2UmbJQYfgHttVUS5av5Io7N568Mu2iX7iOVTooxsW3J9i/mFXPYa6lCYgGTGf9kjxWqBKQ3qpyjQY8CddvWQo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=dfxdP8Aq; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="dfxdP8Aq" X-UUID: a4a126a8fe7311ef8eb9c36241bbb6fb-20250311 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=xW9MxdP5Pf0R81PLT+o7AGx9vnGwBDnmrWMZTZ5+i5U=; b=dfxdP8AqWbCbnHiPhkAJ5+gAPvDcjuW8al3ayHfGdUfGGFsijmnUjFpavSXsJGS9cUg1JtW1YH9J1ReYTid8IFbhEM4420mcLJFxDSwz+Xr+1UHzQU0G83tUt8tTj61QAOmMlM1QbXHDSZOqD41Qk2G6693iqZQbabfzxOhLkKA=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.2.1,REQID:a4170097-4a9e-497f-b904-39b85b7a4379,IP:0,UR L:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:r elease,TS:0 X-CID-META: VersionHash:0ef645f,CLOUDID:ab024dce-23b9-4c94-add0-e827a7999e28,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102,TC:nil,Content:0|50,EDM:-3 ,IP:nil,URL:1,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV :0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULS X-UUID: a4a126a8fe7311ef8eb9c36241bbb6fb-20250311 Received: from mtkmbs09n2.mediatek.inc [(172.21.101.94)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1720162748; Tue, 11 Mar 2025 20:23:30 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by MTKMBS09N1.mediatek.inc (172.21.101.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Tue, 11 Mar 2025 20:23:29 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Tue, 11 Mar 2025 20:23:28 +0800 From: Friday Yang To: Yong Wu , Krzysztof Kozlowski , Rob Herring , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Philipp Zabel CC: Friday Yang , , , , , Subject: [PATCH v5 1/2] dt-bindings: memory: mediatek: Add SMI reset and clamp for MT8188 Date: Tue, 11 Mar 2025 20:23:21 +0800 Message-ID: <20250311122327.20685-2-friday.yang@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250311122327.20685-1-friday.yang@mediatek.com> References: <20250311122327.20685-1-friday.yang@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain From: "Friday Yang" On the MediaTek platform, some SMI LARBs are directly connected to the SMI Common, while others are connected to the SMI Sub-Common, which in turn is connected to the SMI Common. The hardware block diagram can be described as follows. SMI-Common(Smart Multimedia Interface Common) | +----------------+------------------+ | | | | | | | | | | | | | | | larb0 SMI-Sub-Common0 SMI-Sub-Common1 | | | | | larb1 larb2 larb3 larb7 larb9 For previous discussion on the direction of the code modifications, please refer to: https://lore.kernel.org/all/CAFGrd9qZhObQXvm2_abqaX83xMLqxjQETB2=wXpobDWU1CnvkA@mail.gmail.com/ https://lore.kernel.org/all/CAPDyKFpokXV2gJDgowbixTvOH_5VL3B5H8eyhP+KJ5Fasm2rFg@mail.gmail.com/ On the MediaTek MT8188 SoC platform, we encountered power-off failures and SMI bus hang issues during camera stress tests. The issue arises because bus glitches are sometimes produced when MTCMOS powers on or off. While this is fairly normal, the software must handle these glitches to avoid mistaking them for transaction signals. What's more, this issue emerged only after the initial upstreaming of this binding. Without these patches, the SMI becomes unstable during camera stress tests. The software solutions can be summarized as follows: 1. Use CLAMP to disable the SMI sub-common port after turning off the LARB CG and before turning off the LARB MTCMOS. 2. Use CLAMP to disable/enable the SMI sub-common port. 3. Implement an AXI reset for SMI LARBs. This patch primarily add two changes: 1. Add compatible for SMI sub-common on MT8188 SoC. 2. Add 'resets' and 'reset-names' properties for SMI LARBs to support SMI reset operations. Signed-off-by: Friday Yang --- .../mediatek,smi-common.yaml | 2 ++ .../memory-controllers/mediatek,smi-larb.yaml | 19 +++++++++++++++++++ 2 files changed, 21 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml index 2f36ac23604c..4392d349878c 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml @@ -39,6 +39,7 @@ properties: - mediatek,mt8186-smi-common - mediatek,mt8188-smi-common-vdo - mediatek,mt8188-smi-common-vpp + - mediatek,mt8188-smi-sub-common - mediatek,mt8192-smi-common - mediatek,mt8195-smi-common-vdo - mediatek,mt8195-smi-common-vpp @@ -107,6 +108,7 @@ allOf: compatible: contains: enum: + - mediatek,mt8188-smi-sub-common - mediatek,mt8195-smi-sub-common then: required: diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml index 2381660b324c..f4f0ed0f1fd9 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml @@ -69,6 +69,12 @@ properties: description: the hardware id of this larb. It's only required when this hardware id is not consecutive from its M4U point of view. + resets: + maxItems: 1 + + reset-names: + const: larb + required: - compatible - reg @@ -125,6 +131,19 @@ allOf: required: - mediatek,larb-id + - if: # only for image, camera and ipe subsys + properties: + compatible: + const: mediatek,mt8188-smi-larb + mediatek,larb-id: + enum: + [ 9, 10, 11, 12, 13, 16, 17, 18, 19, 20 ] + + then: + required: + - resets + - reset-names + additionalProperties: false examples: -- 2.46.0