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Peter Anvin" , "Rafael J . Wysocki" , Len Brown , Andy Lutomirski , Viresh Kumar , Jean Delvare , Guenter Roeck , Zhang Rui , Andrew Cooper , Dapeng Mi , Sohil Mehta , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 0/2] x86: Prepare for new Intel Family numbers Date: Tue, 18 Mar 2025 22:38:26 +0000 Message-ID: <20250318223828.2945651-1-sohil.mehta@intel.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit ---Summary--- Mainstream Intel processors have been using Family 6 for a couple of decades. This series is an audit of all the arch/x86 Intel Family-model checks to get ready for the upcoming Family 18 and 19 models. It also converts one of the last remaining Intel-specific x86_model checks to VFM ones. Most of the patches were picked up from the v3 series and applied to tip. This series contains the remaining perf/x86 patches rebased on tip:x86/cpu. ---v4 changes--- * Addressed comments from Kan Liang. * Picked up Kan Liang's review tags. * Rebased on top of tip:x86/cpu. ---Previous versions--- Refer to the v2 cover letter for more background. v3: https://lore.kernel.org/lkml/20250219184133.816753-1-sohil.mehta@intel.com/ v2: https://lore.kernel.org/lkml/20250211194407.2577252-1-sohil.mehta@intel.com/ RFC-v1: https://lore.kernel.org/lkml/20241220213711.1892696-1-sohil.mehta@intel.com/ Sohil Mehta (2): perf/x86: Simplify Intel PMU initialization perf/x86/p4: Replace Pentium 4 model checks with VFM ones arch/x86/events/intel/core.c | 14 ++++++++++---- arch/x86/events/intel/p4.c | 7 ++++--- arch/x86/events/intel/p6.c | 26 +++----------------------- arch/x86/include/asm/intel-family.h | 1 + 4 files changed, 18 insertions(+), 30 deletions(-) base-commit: 08d9bb5b0d89826fedc5204c8bd2463220465996 -- 2.43.0