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From: Ian Rogers <irogers@google.com>
To: Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	 Arnaldo Carvalho de Melo <acme@kernel.org>,
	Namhyung Kim <namhyung@kernel.org>,
	 Mark Rutland <mark.rutland@arm.com>,
	 Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>,  Ian Rogers <irogers@google.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	 Kan Liang <kan.liang@linux.intel.com>,
	Weilin Wang <weilin.wang@intel.com>,
	 James Clark <james.clark@linaro.org>,
	Xu Yang <xu.yang_2@nxp.com>,
	 John Garry <john.g.garry@oracle.com>,
	Howard Chu <howardchu95@gmail.com>,
	 Levi Yun <yeoreum.yun@arm.com>,
	Dominique Martinet <asmadeus@codewreck.org>,
	 linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v1 13/14] perf stat: Add mean, min, max and last --tpebs-mode options
Date: Mon, 24 Mar 2025 15:34:51 -0700	[thread overview]
Message-ID: <20250324223452.208081-14-irogers@google.com> (raw)
In-Reply-To: <20250324223452.208081-1-irogers@google.com>

Add command line configuration option for how retirement latency
events are combined. The default "mean" gives the average of
retirement latency. "min" or "max" give the smallest or largest
retirment latency times respectively. "last" uses the last retirment
latency sample's time.

Signed-off-by: Ian Rogers <irogers@google.com>
---
 tools/perf/Documentation/perf-stat.txt |  7 +++++++
 tools/perf/builtin-stat.c              | 27 ++++++++++++++++++++++++++
 tools/perf/util/intel-tpebs.c          | 20 ++++++++++++++++++-
 tools/perf/util/intel-tpebs.h          |  9 +++++++++
 4 files changed, 62 insertions(+), 1 deletion(-)

diff --git a/tools/perf/Documentation/perf-stat.txt b/tools/perf/Documentation/perf-stat.txt
index 2bc063672486..61d091670dee 100644
--- a/tools/perf/Documentation/perf-stat.txt
+++ b/tools/perf/Documentation/perf-stat.txt
@@ -506,6 +506,13 @@ this option is not set. The TPEBS hardware feature starts from Intel Granite
 Rapids microarchitecture. This option only exists in X86_64 and is meaningful on
 Intel platforms with TPEBS feature.
 
+--tpebs-mode=[mean|min|max|last]::
+Set how retirement latency events have their sample times
+combined. The default "mean" gives the average of retirement
+latency. "min" or "max" give the smallest or largest retirment latency
+times respectively. "last" uses the last retirment latency sample's
+time.
+
 --td-level::
 Print the top-down statistics that equal the input level. It allows
 users to print the interested top-down metrics level instead of the
diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c
index 80e491bd775b..4adf2ae53b11 100644
--- a/tools/perf/builtin-stat.c
+++ b/tools/perf/builtin-stat.c
@@ -2327,6 +2327,30 @@ static void setup_system_wide(int forks)
 	}
 }
 
+static int parse_tpebs_mode(const struct option *opt, const char *str,
+			    int unset __maybe_unused)
+{
+	enum tpebs_mode *mode = opt->value;
+
+	if (!strcasecmp("mean", str)) {
+		*mode = TPEBS_MODE__MEAN;
+		return 0;
+	}
+	if (!strcasecmp("min", str)) {
+		*mode = TPEBS_MODE__MIN;
+		return 0;
+	}
+	if (!strcasecmp("max", str)) {
+		*mode = TPEBS_MODE__MAX;
+		return 0;
+	}
+	if (!strcasecmp("last", str)) {
+		*mode = TPEBS_MODE__LAST;
+		return 0;
+	}
+	return -1;
+}
+
 int cmd_stat(int argc, const char **argv)
 {
 	struct opt_aggr_mode opt_mode = {};
@@ -2431,6 +2455,9 @@ int cmd_stat(int argc, const char **argv)
 #ifdef HAVE_ARCH_X86_64_SUPPORT
 		OPT_BOOLEAN(0, "record-tpebs", &tpebs_recording,
 			"enable recording for tpebs when retire_latency required"),
+		OPT_CALLBACK(0, "tpebs-mode", &tpebs_mode, "tpebs-mode",
+			"Mode of TPEBS recording: mean, min or max",
+			parse_tpebs_mode),
 #endif
 		OPT_UINTEGER(0, "td-level", &stat_config.topdown_level,
 			"Set the metrics level for the top-down statistics (0: max level)"),
diff --git a/tools/perf/util/intel-tpebs.c b/tools/perf/util/intel-tpebs.c
index 0def3419b1e5..5a255eb4f057 100644
--- a/tools/perf/util/intel-tpebs.c
+++ b/tools/perf/util/intel-tpebs.c
@@ -30,6 +30,7 @@
 #define PERF_DATA		"-"
 
 bool tpebs_recording;
+enum tpebs_mode tpebs_mode;
 static LIST_HEAD(tpebs_results);
 static pthread_t tpebs_reader_thread;
 static struct child_process tpebs_cmd;
@@ -44,6 +45,8 @@ struct tpebs_retire_lat {
 	char *event;
 	/** @stats: Recorded retirement latency stats. */
 	struct stats stats;
+	/** @last: Last retirement latency read. */
+	uint64_t last;
 	/* Has the event been sent to perf record? */
 	bool started;
 };
@@ -141,6 +144,7 @@ static int process_sample_event(const struct perf_tool *tool __maybe_unused,
 	 * latency value will be used. Save the number of samples and the sum of
 	 * retire latency value for each event.
 	 */
+	t->last = sample->retire_lat;
 	update_stats(&t->stats, sample->retire_lat);
 	mutex_unlock(tpebs_mtx_get());
 	return 0;
@@ -511,7 +515,21 @@ int evsel__tpebs_read(struct evsel *evsel, int cpu_map_idx, int thread)
 			return ret;
 		mutex_lock(tpebs_mtx_get());
 	}
-	val = rint(t->stats.mean);
+	switch (tpebs_mode) {
+	case TPEBS_MODE__MIN:
+		val = rint(t->stats.mean);
+		break;
+	case TPEBS_MODE__MAX:
+		val = rint(t->stats.mean);
+		break;
+	case TPEBS_MODE__LAST:
+		val = t->last;
+		break;
+	default:
+	case TPEBS_MODE__MEAN:
+		val = rint(t->stats.mean);
+		break;
+	}
 	mutex_unlock(tpebs_mtx_get());
 
 	if (old_count) {
diff --git a/tools/perf/util/intel-tpebs.h b/tools/perf/util/intel-tpebs.h
index fa9e4b047e8d..a47a778be46c 100644
--- a/tools/perf/util/intel-tpebs.h
+++ b/tools/perf/util/intel-tpebs.h
@@ -9,7 +9,16 @@ struct evsel;
 
 #ifdef HAVE_ARCH_X86_64_SUPPORT
 
+enum tpebs_mode {
+	TPEBS_MODE__MEAN,
+	TPEBS_MODE__MIN,
+	TPEBS_MODE__MAX,
+	TPEBS_MODE__LAST,
+};
+
 extern bool tpebs_recording;
+extern enum tpebs_mode tpebs_mode;
+
 int evsel__tpebs_open(struct evsel *evsel);
 void evsel__tpebs_close(struct evsel *evsel);
 int evsel__tpebs_read(struct evsel *evsel, int cpu_map_idx, int thread);
-- 
2.49.0.395.g12beb8f557-goog


  parent reply	other threads:[~2025-03-24 22:35 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-24 22:34 [PATCH v1 00/14] Intel TPEBS min/max/mean/last support Ian Rogers
2025-03-24 22:34 ` [PATCH v1 01/14] perf intel-tpebs: Simplify tpebs_cmd Ian Rogers
2025-03-24 22:34 ` [PATCH v1 02/14] perf intel-tpebs: Rename tpebs_start to evsel__tpebs_open Ian Rogers
2025-03-24 22:34 ` [PATCH v1 03/14] perf intel-tpebs: Separate evsel__tpebs_prepare out of evsel__tpebs_open Ian Rogers
2025-03-24 22:34 ` [PATCH v1 04/14] perf intel-tpebs: Move cpumap_buf " Ian Rogers
2025-03-24 22:34 ` [PATCH v1 05/14] perf intel-tpebs: Reduce scope of tpebs_events_size Ian Rogers
2025-03-24 22:34 ` [PATCH v1 06/14] perf intel-tpebs: Inline get_perf_record_args Ian Rogers
2025-03-24 22:34 ` [PATCH v1 07/14] perf intel-tpebs: Ensure events are opened, factor out finding Ian Rogers
2025-03-24 22:34 ` [PATCH v1 08/14] perf intel-tpebs: Refactor tpebs_results list Ian Rogers
2025-03-24 22:34 ` [PATCH v1 09/14] perf intel-tpebs: Add support for updating counts in evsel__tpebs_read Ian Rogers
2025-03-24 22:34 ` [PATCH v1 10/14] perf intel-tpebs: Add mutex for tpebs_results Ian Rogers
2025-03-24 22:34 ` [PATCH v1 11/14] perf intel-tpebs: Don't close record on read Ian Rogers
2025-03-24 22:34 ` [PATCH v1 12/14] perf intel-tpebs: Use stats for retirement latency statistics Ian Rogers
2025-03-24 22:34 ` Ian Rogers [this message]
2025-03-24 22:34 ` [PATCH v1 14/14] perf pmu-events: Add retirement latency to JSON events inside of perf Ian Rogers

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