[PATCH] spi: dt-bindings: cdns,qspi-nor: Update minItems/maxItems of resets for Cadence OSPI controller

[Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>]

The Cadence Octal SPI (OSPI) controller on AMD Versal SoCs requires only
one reset entry. To reflect this, the maxItems for "resets" and
"reset-names" has been set to 1 for AMD Versal SoCs, and the minItems for
these properties has also been updated to 1. Additionally, these properties
have been added to the required property list for Versal SoCs.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
---
BRANCH: mtd/next
---
 .../devicetree/bindings/spi/cdns,qspi-nor.yaml     | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
index d48ecd6cd5ad..cc94c59280a1 100644
--- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
+++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
@@ -17,8 +17,18 @@ allOf:
           contains:
             const: xlnx,versal-ospi-1.0
     then:
+      properties:
+        resets:
+          maxItems: 1
+
+        reset-names:
+          maxItems: 1
+          items:
+            enum: [ qspi ]
       required:
         - power-domains
+        - resets
+        - reset-names
   - if:
       properties:
         compatible:
@@ -132,11 +142,11 @@ properties:
     maxItems: 1
 
   resets:
-    minItems: 2
+    minItems: 1
     maxItems: 3
 
   reset-names:
-    minItems: 2
+    minItems: 1
     maxItems: 3
     items:
       enum: [ qspi, qspi-ocp, rstc_ref ]
-- 
2.34.1