From: Jason Gunthorpe <jgg@ziepe.ca>
To: Xu Lu <luxu.kernel@bytedance.com>
Cc: akpm@linux-foundation.org, jhubbard@nvidia.com,
kirill.shutemov@linux.intel.com, tjeznach@rivosinc.com,
joro@8bytes.org, will@kernel.org, robin.murphy@arm.com,
lihangjing@bytedance.com, xieyongji@bytedance.com,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-mm@kvack.org
Subject: Re: [PATCH RESEND v2 3/4] iommu/riscv: Introduce IOMMU page table lock
Date: Tue, 1 Apr 2025 12:19:51 -0300 [thread overview]
Message-ID: <20250401151951.GG186258@ziepe.ca> (raw)
In-Reply-To: <20250318035930.11855-4-luxu.kernel@bytedance.com>
On Tue, Mar 18, 2025 at 11:59:29AM +0800, Xu Lu wrote:
> Introduce page table lock to address competition issues when modifying
> multiple PTEs, for example, when applying Svnapot. We use fine-grained
> page table locks to minimize lock contention.
This does not seem right, there is no need for locks to manage a cont
bit on the iommu side.
Jason
next prev parent reply other threads:[~2025-04-01 15:19 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-18 3:59 [PATCH RESEND v2 0/4] riscv: iommu: Support Svnapot Xu Lu
2025-03-18 3:59 ` [PATCH RESEND v2 1/4] mm/gup: Add huge pte handling logic in follow_page_pte() Xu Lu
2025-03-18 3:59 ` [PATCH RESEND v2 2/4] iommu/riscv: Use pte_t to represent page table entry Xu Lu
2025-03-18 3:59 ` [PATCH RESEND v2 3/4] iommu/riscv: Introduce IOMMU page table lock Xu Lu
2025-04-01 15:19 ` Jason Gunthorpe [this message]
2025-03-18 3:59 ` [PATCH RESEND v2 4/4] iommu/riscv: Add support for Svnapot Xu Lu
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