From: kernel test robot <lkp@intel.com>
To: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Cc: oe-kbuild-all@lists.linux.dev, linux-kernel@vger.kernel.org,
Oliver Upton <oliver.upton@linux.dev>
Subject: drivers/firmware/smccc/kvm_guest.c:106:2-3: Unneeded semicolon
Date: Wed, 2 Apr 2025 09:41:55 +0800 [thread overview]
Message-ID: <202504020941.VEeL6nVJ-lkp@intel.com> (raw)
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 91e5bfe317d8f8471fbaa3e70cf66cae1314a516
commit: 44ff44cadbd144ee1159f5687a852c49c4290262 smccc: kvm_guest: Fix kernel builds for 32 bit arm
date: 4 weeks ago
config: arm-randconfig-r053-20250402 (https://download.01.org/0day-ci/archive/20250402/202504020941.VEeL6nVJ-lkp@intel.com/config)
compiler: clang version 21.0.0git (https://github.com/llvm/llvm-project 7eccafc3c84606587a175c0a8c1ebea6e4fb21cd)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202504020941.VEeL6nVJ-lkp@intel.com/
cocci warnings: (new ones prefixed by >>)
>> drivers/firmware/smccc/kvm_guest.c:106:2-3: Unneeded semicolon
vim +106 drivers/firmware/smccc/kvm_guest.c
86edf6bdcf0571 Shameer Kolothum 2025-02-21 57
44ff44cadbd144 Shameer Kolothum 2025-03-06 58 #ifdef CONFIG_ARM64
86edf6bdcf0571 Shameer Kolothum 2025-02-21 59 void __init kvm_arm_target_impl_cpu_init(void)
86edf6bdcf0571 Shameer Kolothum 2025-02-21 60 {
86edf6bdcf0571 Shameer Kolothum 2025-02-21 61 int i;
86edf6bdcf0571 Shameer Kolothum 2025-02-21 62 u32 ver;
86edf6bdcf0571 Shameer Kolothum 2025-02-21 63 u64 max_cpus;
86edf6bdcf0571 Shameer Kolothum 2025-02-21 64 struct arm_smccc_res res;
86edf6bdcf0571 Shameer Kolothum 2025-02-21 65 struct target_impl_cpu *target;
86edf6bdcf0571 Shameer Kolothum 2025-02-21 66
86edf6bdcf0571 Shameer Kolothum 2025-02-21 67 if (!kvm_arm_hyp_service_available(ARM_SMCCC_KVM_FUNC_DISCOVER_IMPL_VER) ||
86edf6bdcf0571 Shameer Kolothum 2025-02-21 68 !kvm_arm_hyp_service_available(ARM_SMCCC_KVM_FUNC_DISCOVER_IMPL_CPUS))
86edf6bdcf0571 Shameer Kolothum 2025-02-21 69 return;
86edf6bdcf0571 Shameer Kolothum 2025-02-21 70
86edf6bdcf0571 Shameer Kolothum 2025-02-21 71 arm_smccc_1_1_invoke(ARM_SMCCC_VENDOR_HYP_KVM_DISCOVER_IMPL_VER_FUNC_ID,
86edf6bdcf0571 Shameer Kolothum 2025-02-21 72 0, &res);
86edf6bdcf0571 Shameer Kolothum 2025-02-21 73 if (res.a0 != SMCCC_RET_SUCCESS)
86edf6bdcf0571 Shameer Kolothum 2025-02-21 74 return;
86edf6bdcf0571 Shameer Kolothum 2025-02-21 75
86edf6bdcf0571 Shameer Kolothum 2025-02-21 76 /* Version info is in lower 32 bits and is in SMMCCC_VERSION format */
86edf6bdcf0571 Shameer Kolothum 2025-02-21 77 ver = lower_32_bits(res.a1);
86edf6bdcf0571 Shameer Kolothum 2025-02-21 78 if (PSCI_VERSION_MAJOR(ver) != 1) {
86edf6bdcf0571 Shameer Kolothum 2025-02-21 79 pr_warn("Unsupported target CPU implementation version v%d.%d\n",
86edf6bdcf0571 Shameer Kolothum 2025-02-21 80 PSCI_VERSION_MAJOR(ver), PSCI_VERSION_MINOR(ver));
86edf6bdcf0571 Shameer Kolothum 2025-02-21 81 return;
86edf6bdcf0571 Shameer Kolothum 2025-02-21 82 }
86edf6bdcf0571 Shameer Kolothum 2025-02-21 83
86edf6bdcf0571 Shameer Kolothum 2025-02-21 84 if (!res.a2) {
86edf6bdcf0571 Shameer Kolothum 2025-02-21 85 pr_warn("No target implementation CPUs specified\n");
86edf6bdcf0571 Shameer Kolothum 2025-02-21 86 return;
86edf6bdcf0571 Shameer Kolothum 2025-02-21 87 }
86edf6bdcf0571 Shameer Kolothum 2025-02-21 88
86edf6bdcf0571 Shameer Kolothum 2025-02-21 89 max_cpus = res.a2;
86edf6bdcf0571 Shameer Kolothum 2025-02-21 90 target = memblock_alloc(sizeof(*target) * max_cpus, __alignof__(*target));
86edf6bdcf0571 Shameer Kolothum 2025-02-21 91 if (!target) {
86edf6bdcf0571 Shameer Kolothum 2025-02-21 92 pr_warn("Not enough memory for struct target_impl_cpu\n");
86edf6bdcf0571 Shameer Kolothum 2025-02-21 93 return;
86edf6bdcf0571 Shameer Kolothum 2025-02-21 94 }
86edf6bdcf0571 Shameer Kolothum 2025-02-21 95
86edf6bdcf0571 Shameer Kolothum 2025-02-21 96 for (i = 0; i < max_cpus; i++) {
86edf6bdcf0571 Shameer Kolothum 2025-02-21 97 arm_smccc_1_1_invoke(ARM_SMCCC_VENDOR_HYP_KVM_DISCOVER_IMPL_CPUS_FUNC_ID,
86edf6bdcf0571 Shameer Kolothum 2025-02-21 98 i, &res);
86edf6bdcf0571 Shameer Kolothum 2025-02-21 99 if (res.a0 != SMCCC_RET_SUCCESS) {
86edf6bdcf0571 Shameer Kolothum 2025-02-21 100 pr_warn("Discovering target implementation CPUs failed\n");
86edf6bdcf0571 Shameer Kolothum 2025-02-21 101 goto mem_free;
86edf6bdcf0571 Shameer Kolothum 2025-02-21 102 }
86edf6bdcf0571 Shameer Kolothum 2025-02-21 103 target[i].midr = res.a1;
86edf6bdcf0571 Shameer Kolothum 2025-02-21 104 target[i].revidr = res.a2;
86edf6bdcf0571 Shameer Kolothum 2025-02-21 105 target[i].aidr = res.a3;
86edf6bdcf0571 Shameer Kolothum 2025-02-21 @106 };
:::::: The code at line 106 was first introduced by commit
:::::: 86edf6bdcf0571c07103b8751e9d792a4b808e97 smccc/kvm_guest: Enable errata based on implementation CPUs
:::::: TO: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
:::::: CC: Oliver Upton <oliver.upton@linux.dev>
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
reply other threads:[~2025-04-02 1:42 UTC|newest]
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