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From: Rob Herring <robh@kernel.org>
To: Jayesh Choudhary <j-choudhary@ti.com>
Cc: krzk+dt@kernel.org, conor+dt@kernel.org, nm@ti.com,
	vigneshr@ti.com, afd@ti.com, s-vadapalli@ti.com,
	linux-kernel@vger.kernel.org, kristo@kernel.org,
	rogerq@kernel.org, kishon@kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 1/5] dt-bindings: soc: ti: ti,j721e-system-controller: Add PCIe ctrl property
Date: Fri, 4 Apr 2025 11:10:26 -0500	[thread overview]
Message-ID: <20250404161026.GA1524211-robh@kernel.org> (raw)
In-Reply-To: <20250402113201.151195-2-j-choudhary@ti.com>

On Wed, Apr 02, 2025 at 05:01:57PM +0530, Jayesh Choudhary wrote:
> From: Andrew Davis <afd@ti.com>
> 
> Add a pattern property for pcie-ctrl which can be part of this controller.
> 
> Signed-off-by: Andrew Davis <afd@ti.com>
> [j-choudhary@ti.com: Change description and add example]
> Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
> ---
>  .../bindings/soc/ti/ti,j721e-system-controller.yaml    | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
> index 378e9cc5fac2..13b6b6fa5dee 100644
> --- a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
> +++ b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
> @@ -68,6 +68,11 @@ patternProperties:
>      description:
>        The node corresponding to SoC chip identification.
>  
> +  "^pcie-ctrl@[0-9a-f]+$":
> +    type: object
> +    description:
> +      The node corresponding to PCIe control register.
> +
>  required:
>    - compatible
>    - reg
> @@ -110,5 +115,10 @@ examples:
>              compatible = "ti,am654-chipid";
>              reg = <0x14 0x4>;
>          };
> +
> +        pcie0_ctrl: pcie-ctrl@4070 {
> +            compatible = "ti,j784s4-pcie-ctrl", "syscon";

If the parent is a syscon, then this shouldn't really be a syscon. You 
can just use the parent's regmap.

But I guess that ship has sailed. This is why bindings should be 
complete, so we can review the whole block.

Acked-by: Rob Herring (Arm) <robh@kernel.org>

  reply	other threads:[~2025-04-04 16:10 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-02 11:31 [PATCH v2 0/5] Use ti,j784s4-pcie-ctrl for PCIe CTRL spaces Jayesh Choudhary
2025-04-02 11:31 ` [PATCH v2 1/5] dt-bindings: soc: ti: ti,j721e-system-controller: Add PCIe ctrl property Jayesh Choudhary
2025-04-04 16:10   ` Rob Herring [this message]
2025-04-11 11:20   ` Siddharth Vadapalli
2025-04-02 11:31 ` [PATCH v2 2/5] arm64: dts: ti: k3-j721e: Add PCIe ctrl node to scm_conf region Jayesh Choudhary
2025-04-11 11:20   ` Siddharth Vadapalli
2025-04-02 11:31 ` [PATCH v2 3/5] arm64: dts: ti: k3-j7200: " Jayesh Choudhary
2025-04-11 11:20   ` Siddharth Vadapalli
2025-04-02 11:32 ` [PATCH v2 4/5] arm64: dts: ti: k3-j721s2: " Jayesh Choudhary
2025-04-11 11:20   ` Siddharth Vadapalli
2025-04-02 11:32 ` [PATCH v2 5/5] arm64: dts: ti: k3-am64: Add PCIe ctrl node to main_conf region Jayesh Choudhary
2025-04-11 11:20   ` Siddharth Vadapalli
2025-04-18 18:58 ` [PATCH v2 0/5] Use ti,j784s4-pcie-ctrl for PCIe CTRL spaces Nishanth Menon

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