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Sun, 06 Apr 2025 23:35:18 -0700 (PDT) Received: from [127.0.0.1] ([2001:250:5800:1000::610c]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-305983da691sm8048044a91.47.2025.04.06.23.35.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Apr 2025 23:35:18 -0700 (PDT) From: Zixian Zeng Subject: [PATCH v4 0/2] Add basic SPI support for SG2042 SoC Date: Mon, 07 Apr 2025 14:35:11 +0800 Message-Id: <20250407-sfg-spi-v4-0-30ac949a1e35@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAB9y82cC/3XMTQ7CIBCG4as0rMXAQCu48h7GBbRDS2J/AoZom t5d2k2NxuU3meedScTgMZJzMZOAyUc/DnnIQ0HqzgwtUt/kTYBByQAUja6lcfIUhQODtWHaWJK /p4DOP7fS9ZZ35+NjDK8tnPh6/W0kTjm1WmmDjZaa80vbG38/1mNP1kaCPw6yU9Y6EFaVDcNvJ 3YnuNidoIxipSoJJ8GlhU+3LMsbN/KdLQ4BAAA= X-Change-ID: 20250228-sfg-spi-e3f2aeca09ab To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Chen Wang , Inochi Amaoto , Alexandre Ghiti , Mark Brown , Inochi Amaoto Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, sophgo@lists.linux.dev, chao.wei@sophgo.com, xiaoguang.xing@sophgo.com, dlan@gentoo.org, Zixian Zeng X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1744007713; l=1831; i=sycamoremoon376@gmail.com; s=20250113; h=from:subject:message-id; bh=PrUQRbB1c+rJuvNmtq5sRl5XHonz7LhulE1jv95UeZM=; b=+Go8UegZSi0E77pZKJXd0DldPDvqti7TxLG0uptVeWXzxZduvooGHEgeSM4M2YYM6pATGfmqi JNh79RwI3F1B23p/37XeiAocKXBVwsXHOPhGKqqgwGevMOI5xoQHKvL X-Developer-Key: i=sycamoremoon376@gmail.com; a=ed25519; pk=OYfH6Z2Nx3aU1r0UZdvhskmddV6KC6V1nyFjsQQt4J8= Implemented basic SPI support for SG2042 SoC[1] using the upstreamed Synopsys DW-SPI IP. This is tested on milkv-pioneer board on bus level. Using driver/spi/spidev.c for creating virtual /dev/spidevX.Y and tools/spi/spidev_test for testing functionality. Signed-off-by: Zixian Zeng --- Changes in v4: - Adjust the order of spi nodes - Place the binding after Renesas - Fix the description issues of patches - Link to v3: https://lore.kernel.org/r/20250313-sfg-spi-v3-0-e686427314b2@gmail.com Changes in v3: - Remove the spi status on sg2042-milkv-pioneer board - Remove remove clock GATE_CLK_SYSDMA_AXI from spi[2] - Create dt-binding of compatible property - Replace the general compatible property with SoC-specific in dts - Link to v2: https://lore.kernel.org/r/20250228-sfg-spi-v2-1-8bbf23b85d0e@gmail.com Changes in v2: - Rebase v1 to sophgo/master(github.com/sophgo/linux.git). - Order properties in device node. - Remove unevaluated properties `clock-frequency`. - Set default status to disable. - Link to v1: https://lore.kernel.org/r/20250228-sfg-spi-v1-1-b989aed94911@gmail.com [1] https://github.com/sophgo/sophgo-doc/blob/main/SG2042/TRM/source/SPI.rst [2] https://github.com/sophgo/sophgo-doc/blob/main/SG2042/TRM/source/clock.rst#clock-tree --- Zixian Zeng (2): spi: dt-bindings: snps,dw-apb-ssi: Add compatible for SOPHGO SG2042 SoC riscv: sophgo: dts: Add spi controller for SG2042 .../devicetree/bindings/spi/snps,dw-apb-ssi.yaml | 4 ++++ arch/riscv/boot/dts/sophgo/sg2042.dtsi | 26 ++++++++++++++++++++++ 2 files changed, 30 insertions(+) --- base-commit: 0af2f6be1b4281385b618cb86ad946eded089ac8 change-id: 20250228-sfg-spi-e3f2aeca09ab Best regards, -- Zixian Zeng