From: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
To: <linux-kernel@vger.kernel.org>
Cc: <bp@alien8.de>, <tglx@linutronix.de>, <mingo@redhat.com>,
<dave.hansen@linux.intel.com>, <Thomas.Lendacky@amd.com>,
<nikunj@amd.com>, <Santosh.Shukla@amd.com>,
<Vasant.Hegde@amd.com>, <Suravee.Suthikulpanit@amd.com>,
<David.Kaplan@amd.com>, <x86@kernel.org>, <hpa@zytor.com>,
<peterz@infradead.org>, <seanjc@google.com>,
<pbonzini@redhat.com>, <kvm@vger.kernel.org>,
<kirill.shutemov@linux.intel.com>, <huibo.wang@amd.com>,
<naveen.rao@amd.com>, <francescolavra.fl@gmail.com>
Subject: [PATCH v4 01/18] KVM: x86: Move find_highest_vector() to a common header
Date: Thu, 17 Apr 2025 14:46:51 +0530 [thread overview]
Message-ID: <20250417091708.215826-2-Neeraj.Upadhyay@amd.com> (raw)
In-Reply-To: <20250417091708.215826-1-Neeraj.Upadhyay@amd.com>
In preparation for using find_highest_vector() in Secure AVIC
guest APIC driver, move (and rename) find_highest_vector() to
apic.h.
Signed-off-by: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
---
Changes since v3:
- New patch to move KVM updates to a separate patch.
arch/x86/include/asm/apic.h | 23 +++++++++++++++++++++++
arch/x86/kvm/lapic.c | 23 +++--------------------
2 files changed, 26 insertions(+), 20 deletions(-)
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 1c136f54651c..c63c2fe8ad13 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -500,6 +500,29 @@ static inline bool is_vector_pending(unsigned int vector)
return lapic_vector_set_in_irr(vector) || pi_pending_this_cpu(vector);
}
+#define MAX_APIC_VECTOR 256
+#define APIC_VECTORS_PER_REG 32
+
+static inline int apic_find_highest_vector(void *bitmap)
+{
+ unsigned int regno;
+ unsigned int vec;
+ u32 *reg;
+
+ /*
+ * The registers in the bitmap are 32-bit wide and 16-byte
+ * aligned. State of a vector is stored in a single bit.
+ */
+ for (regno = MAX_APIC_VECTOR / APIC_VECTORS_PER_REG - 1; regno >= 0; regno--) {
+ vec = regno * APIC_VECTORS_PER_REG;
+ reg = bitmap + regno * 16;
+ if (*reg)
+ return __fls(*reg) + vec;
+ }
+
+ return -1;
+}
+
/*
* Warm reset vector position:
*/
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 28e3317124fd..775eb742d110 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -27,6 +27,7 @@
#include <linux/export.h>
#include <linux/math64.h>
#include <linux/slab.h>
+#include <asm/apic.h>
#include <asm/processor.h>
#include <asm/mce.h>
#include <asm/msr.h>
@@ -55,9 +56,6 @@
/* 14 is the version for Xeon and Pentium 8.4.8*/
#define APIC_VERSION 0x14UL
#define LAPIC_MMIO_LENGTH (1 << 12)
-/* followed define is not in apicdef.h */
-#define MAX_APIC_VECTOR 256
-#define APIC_VECTORS_PER_REG 32
/*
* Enable local APIC timer advancement (tscdeadline mode only) with adaptive
@@ -626,21 +624,6 @@ static const unsigned int apic_lvt_mask[KVM_APIC_MAX_NR_LVT_ENTRIES] = {
[LVT_CMCI] = LVT_MASK | APIC_MODE_MASK
};
-static int find_highest_vector(void *bitmap)
-{
- int vec;
- u32 *reg;
-
- for (vec = MAX_APIC_VECTOR - APIC_VECTORS_PER_REG;
- vec >= 0; vec -= APIC_VECTORS_PER_REG) {
- reg = bitmap + REG_POS(vec);
- if (*reg)
- return __fls(*reg) + vec;
- }
-
- return -1;
-}
-
static u8 count_vectors(void *bitmap)
{
int vec;
@@ -704,7 +687,7 @@ EXPORT_SYMBOL_GPL(kvm_apic_update_irr);
static inline int apic_search_irr(struct kvm_lapic *apic)
{
- return find_highest_vector(apic->regs + APIC_IRR);
+ return apic_find_highest_vector(apic->regs + APIC_IRR);
}
static inline int apic_find_highest_irr(struct kvm_lapic *apic)
@@ -779,7 +762,7 @@ static inline int apic_find_highest_isr(struct kvm_lapic *apic)
if (likely(apic->highest_isr_cache != -1))
return apic->highest_isr_cache;
- result = find_highest_vector(apic->regs + APIC_ISR);
+ result = apic_find_highest_vector(apic->regs + APIC_ISR);
ASSERT(result == -1 || result >= 16);
return result;
--
2.34.1
next prev parent reply other threads:[~2025-04-17 9:17 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-17 9:16 [PATCH v4 00/18] AMD: Add Secure AVIC Guest Support Neeraj Upadhyay
2025-04-17 9:16 ` Neeraj Upadhyay [this message]
2025-04-17 9:16 ` [PATCH v4 02/18] x86/apic: Add new driver for Secure AVIC Neeraj Upadhyay
2025-04-17 9:16 ` [PATCH v4 03/18] x86/apic: Initialize Secure AVIC APIC backing page Neeraj Upadhyay
2025-04-17 9:16 ` [PATCH v4 04/18] x86/apic: Populate .read()/.write() callbacks of Secure AVIC driver Neeraj Upadhyay
2025-04-17 9:16 ` [PATCH v4 05/18] x86/apic: Initialize APIC ID for Secure AVIC Neeraj Upadhyay
2025-04-17 9:16 ` [PATCH v4 06/18] x86/apic: Add update_vector callback " Neeraj Upadhyay
2025-04-17 10:50 ` Thomas Gleixner
2025-04-17 12:00 ` Neeraj Upadhyay
2025-04-17 16:51 ` Thomas Gleixner
2025-04-17 10:52 ` Thomas Gleixner
2025-04-17 12:12 ` Neeraj Upadhyay
2025-04-17 16:52 ` Thomas Gleixner
2025-04-17 9:16 ` [PATCH v4 07/18] x86/apic: Add support to send IPI " Neeraj Upadhyay
2025-04-17 9:16 ` [PATCH v4 08/18] x86/apic: Support LAPIC timer " Neeraj Upadhyay
2025-04-17 9:16 ` [PATCH v4 09/18] x86/sev: Initialize VGIF for secondary VCPUs " Neeraj Upadhyay
2025-04-17 9:17 ` [PATCH v4 10/18] x86/apic: Add support to send NMI IPI " Neeraj Upadhyay
2025-04-17 9:17 ` [PATCH v4 11/18] x86/apic: Allow NMI to be injected from hypervisor " Neeraj Upadhyay
2025-04-17 9:17 ` [PATCH v4 12/18] x86/sev: Enable NMI support " Neeraj Upadhyay
2025-04-17 9:17 ` [PATCH v4 13/18] x86/apic: Read and write LVT* APIC registers from HV for SAVIC guests Neeraj Upadhyay
2025-04-17 9:17 ` [PATCH v4 14/18] x86/apic: Handle EOI writes " Neeraj Upadhyay
2025-04-17 9:17 ` [PATCH v4 15/18] x86/apic: Add kexec support for Secure AVIC Neeraj Upadhyay
2025-04-17 9:17 ` [PATCH v4 16/18] x86/apic: Enable Secure AVIC in Control MSR Neeraj Upadhyay
2025-04-17 9:17 ` [PATCH v4 17/18] x86/sev: Prevent SECURE_AVIC_CONTROL MSR interception for Secure AVIC guests Neeraj Upadhyay
2025-04-17 9:17 ` [PATCH v4 18/18] x86/sev: Indicate SEV-SNP guest supports Secure AVIC Neeraj Upadhyay
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