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a=ed25519-sha256; t=1745041398; l=2631; i=krishna.chundru@oss.qualcomm.com; s=20230907; h=from:subject:message-id; bh=2POJjFRmmzjMYgY8hhtxuwW1PCP805TvsmSsbRyGfj0=; b=T8h+eYm+ALVcmWH0/PXzcoNx4g9qn2eTxFkoLBodo0iBMM8I12I7HL4QST4/zjnw9DNElV+VP +hUUGbd0EVvDyWSnnsV1lj0ZX+4HUNtPw4Xjrf7pps5cm3V3MurkxQC X-Developer-Key: i=krishna.chundru@oss.qualcomm.com; a=ed25519; pk=10CL2pdAKFyzyOHbfSWHCD0X0my7CXxj8gJScmn1FAg= X-Authority-Analysis: v=2.4 cv=EOYG00ZC c=1 sm=1 tr=0 ts=680337fc cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=Ikd4Dj_1AAAA:8 a=s8YR1HE3AAAA:8 a=zkpMToBQJcapbifWyZsA:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 a=jGH_LyMDp9YhSvY-UuyI:22 X-Proofpoint-GUID: 46Ib2A9cvbetr3uQxGZsofS8A4_XpaxT X-Proofpoint-ORIG-GUID: 46Ib2A9cvbetr3uQxGZsofS8A4_XpaxT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-19_02,2025-04-17_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 mlxlogscore=561 mlxscore=0 clxscore=1015 lowpriorityscore=0 malwarescore=0 priorityscore=1501 phishscore=0 spamscore=0 adultscore=0 impostorscore=0 bulkscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504190043 PCIe wake interrupt is needed for bringing back PCIe device state from D3cold to D0. This is pending from long time, there was two attempts done previously to add wake support[1], [2]. Those series tried to add support for legacy interrupts along with wake. Legacy interrupts are already available in the latest kernel and we can ignore them. For the wake IRQ the series is trying to use interrupts property define in the device tree. This series is using gpio property instead of interrupts, from gpio desc driver will allocate the dedicate IRQ and initiate the wake IRQ from the port bus driver instead of pcie framework as adding in the pcie framework will be applicable to the endpoint devices also. As the port bus driver is for bridges, portbus driver is correct place to invoke them. Add two new functions, of_pci_setup_wake_irq() and of_pci_teardown_wake_irq(), to manage wake interrupts for PCI devices using the Device Tree. The series depend on the following series: https://lore.kernel.org/linux-arm-msm/20250322-perst-v1-3-e5e4da74a204@oss.qualcomm.com/T/ [1]: https://lore.kernel.org/all/b2b91240-95fe-145d-502c-d52225497a34@nvidia.com/T/ [2]: https://lore.kernel.org/all/20171226023646.17722-1-jeffy.chen@rock-chips.com/ Signed-off-by: Krishna Chaitanya Chundru --- Changes in v2: - Move the wake irq teardown after pcie_port_device_remove and move of_pci_setup_wake_irq before pcie_link_rcec (Lukas) - teardown wake irq in shutdown also. - Link to v1: https://lore.kernel.org/r/20250401-wake_irq_support-v1-0-d2e22f4a0efd@oss.qualcomm.com --- Krishna Chaitanya Chundru (2): arm64: dts: qcom: sc7280: Add wake GPIO PCI: Add support for PCIe wake interrupt arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 1 + arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 1 + arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 1 + drivers/pci/of.c | 60 ++++++++++++++++++++++++++ drivers/pci/pci.h | 6 +++ drivers/pci/pcie/portdrv.c | 12 +++++- 6 files changed, 80 insertions(+), 1 deletion(-) --- base-commit: 88d324e69ea9f3ae1c1905ea75d717c08bdb8e15 change-id: 20250329-wake_irq_support-79772fc8cd44 prerequisite-change-id: 20250101-perst-cb885b5a6129:v1 prerequisite-patch-id: 3cff2ef415ec12c8ddb7ce7193035ce546081243 prerequisite-patch-id: 820dbf5dc092c32c8394fbc33f9fe6b8da6e6eab prerequisite-patch-id: 7f87f54386a87b39ca346b53d3c34ff0d0cb7911 Best regards, -- Krishna Chaitanya Chundru