From: Ingo Molnar <mingo@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: Ingo Molnar <mingo@kernel.org>,
"Ahmed S . Darwish" <darwi@linutronix.de>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Ard Biesheuvel <ardb@kernel.org>, Arnd Bergmann <arnd@kernel.org>,
Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
"H . Peter Anvin" <hpa@zytor.com>,
John Ogness <john.ogness@linutronix.de>,
Linus Torvalds <torvalds@linux-foundation.org>,
Peter Zijlstra <peterz@infradead.org>,
Thomas Gleixner <tglx@linutronix.de>,
Arnd Bergmann <arnd@arndb.de>
Subject: [PATCH 02/15] x86/cpu: Remove CONFIG_MWINCHIP3D/MWINCHIPC6
Date: Fri, 25 Apr 2025 10:41:59 +0200 [thread overview]
Message-ID: <20250425084216.3913608-3-mingo@kernel.org> (raw)
In-Reply-To: <20250425084216.3913608-1-mingo@kernel.org>
These CPUs lack CMPXCHG8B support, according to Arnd Bergmann:
| "Winchip6 (486-class, no tsc, no cx8) and Winchip3D
| (486-class, with tsc but no cx8)"
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
---
arch/x86/Kconfig.cpu | 28 ++++------------------------
arch/x86/Makefile_32.cpu | 2 --
arch/x86/include/asm/vermagic.h | 4 ----
3 files changed, 4 insertions(+), 30 deletions(-)
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index 881d5f5ae7d5..f656033b3a8a 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -32,8 +32,6 @@ choice
- "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
- "Crusoe" for the Transmeta Crusoe series.
- "Efficeon" for the Transmeta Efficeon series.
- - "Winchip-C6" for original IDT Winchip.
- - "Winchip-2" for IDT Winchips with 3dNow! capabilities.
- "AMD Elan" for the 32-bit AMD Elan embedded CPU.
- "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
- "Geode GX/LX" For AMD Geode GX and LX processors.
@@ -155,24 +153,6 @@ config MEFFICEON
help
Select this for a Transmeta Efficeon processor.
-config MWINCHIPC6
- bool "Winchip-C6"
- depends on X86_32
- help
- Select this for an IDT Winchip C6 chip. Linux and GCC
- treat this chip as a 586TSC with some extended instructions
- and alignment requirements.
-
-config MWINCHIP3D
- bool "Winchip-2/Winchip-2A/Winchip-3"
- depends on X86_32
- help
- Select this for an IDT Winchip-2, 2A or 3. Linux and GCC
- treat this chip as a 586TSC with some extended instructions
- and alignment requirements. Also enable out of order memory
- stores for this CPU, which can increase performance of some
- operations.
-
config MGEODEGX1
bool "GeodeGX1"
depends on X86_32
@@ -246,7 +226,7 @@ config X86_L1_CACHE_SHIFT
default "7" if MPENTIUM4
default "6" if MK7 || MPENTIUMM || MATOM || MVIAC7 || X86_GENERIC || X86_64
default "4" if MGEODEGX1
- default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
+ default "5" if MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
config X86_F00F_BUG
def_bool y
@@ -258,7 +238,7 @@ config X86_INVD_BUG
config X86_ALIGNMENT_16
def_bool y
- depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK6 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODEGX1
+ depends on MCYRIXIII || MK6 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODEGX1
config X86_INTEL_USERCOPY
def_bool y
@@ -266,7 +246,7 @@ config X86_INTEL_USERCOPY
config X86_USE_PPRO_CHECKSUM
def_bool y
- depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MATOM
+ depends on MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MATOM
config X86_TSC
def_bool y
@@ -295,7 +275,7 @@ config X86_MINIMUM_CPU_FAMILY
config X86_DEBUGCTLMSR
def_bool y
- depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586) && !UML
+ depends on !(MK6 || MCYRIXIII || M586MMX || M586TSC || M586) && !UML
config IA32_FEAT_CTL
def_bool y
diff --git a/arch/x86/Makefile_32.cpu b/arch/x86/Makefile_32.cpu
index 98ca6dd70d01..2dda0a19b06a 100644
--- a/arch/x86/Makefile_32.cpu
+++ b/arch/x86/Makefile_32.cpu
@@ -24,8 +24,6 @@ cflags-$(CONFIG_MK6) += -march=k6
cflags-$(CONFIG_MK7) += -march=athlon
cflags-$(CONFIG_MCRUSOE) += -march=i686 $(align)
cflags-$(CONFIG_MEFFICEON) += -march=i686 $(call tune,pentium3) $(align)
-cflags-$(CONFIG_MWINCHIPC6) += $(call cc-option,-march=winchip-c6,-march=i586)
-cflags-$(CONFIG_MWINCHIP3D) += $(call cc-option,-march=winchip2,-march=i586)
cflags-$(CONFIG_MCYRIXIII) += $(call cc-option,-march=c3,-march=i486) $(align)
cflags-$(CONFIG_MVIAC3_2) += $(call cc-option,-march=c3-2,-march=i686)
cflags-$(CONFIG_MVIAC7) += -march=i686
diff --git a/arch/x86/include/asm/vermagic.h b/arch/x86/include/asm/vermagic.h
index eda233a90ea8..b3a8beb32dfd 100644
--- a/arch/x86/include/asm/vermagic.h
+++ b/arch/x86/include/asm/vermagic.h
@@ -31,10 +31,6 @@
#define MODULE_PROC_FAMILY "CRUSOE "
#elif defined CONFIG_MEFFICEON
#define MODULE_PROC_FAMILY "EFFICEON "
-#elif defined CONFIG_MWINCHIPC6
-#define MODULE_PROC_FAMILY "WINCHIPC6 "
-#elif defined CONFIG_MWINCHIP3D
-#define MODULE_PROC_FAMILY "WINCHIP3D "
#elif defined CONFIG_MCYRIXIII
#define MODULE_PROC_FAMILY "CYRIXIII "
#elif defined CONFIG_MVIAC3_2
--
2.45.2
next prev parent reply other threads:[~2025-04-25 8:42 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-25 8:41 [RFC PATCH 0/15] x86: Remove support for TSC-less and CX8-less CPUs Ingo Molnar
2025-04-25 8:41 ` [PATCH 01/15] x86/cpu: Remove M486/M486SX/ELAN support Ingo Molnar
2025-04-25 8:41 ` Ingo Molnar [this message]
2025-04-25 8:42 ` [PATCH 03/15] x86/cpu: Remove CPU_SUP_UMC_32 support Ingo Molnar
2025-04-25 8:42 ` [PATCH 04/15] x86/cpu: Remove TSC-less CONFIG_M586 support Ingo Molnar
2025-04-25 15:09 ` H. Peter Anvin
2025-04-25 8:42 ` [PATCH 05/15] x86/cpu, x86/platform, watchdog: Remove CONFIG_X86_RDC321X support Ingo Molnar
2025-04-25 8:42 ` [PATCH 06/15] x86/cpu: Remove the CONFIG_X86_INVD_BUG quirk Ingo Molnar
2025-04-25 8:42 ` [PATCH 07/15] x86/cpu, cpufreq: Remove AMD ELAN support Ingo Molnar
2025-04-25 8:42 ` [PATCH 08/15] x86/fpu: Remove MATH_EMULATION and related glue code Ingo Molnar
2025-04-25 8:42 ` [PATCH 09/15] x86/fpu: Remove the 'no387' boot option Ingo Molnar
2025-04-25 8:42 ` [PATCH 10/15] x86/fpu: Remove the math-emu/ FPU emulation library Ingo Molnar
2025-04-25 8:42 ` [PATCH 11/15] x86/cpu: Make CONFIG_X86_TSC unconditional Ingo Molnar
2025-04-25 8:42 ` [PATCH 12/15] x86: Remove !CONFIG_X86_TSC code Ingo Molnar
2025-04-25 8:42 ` [PATCH 13/15] x86/cpu: Make CONFIG_X86_CX8 unconditional Ingo Molnar
2025-04-25 12:10 ` Arnd Bergmann
2025-04-25 15:15 ` H. Peter Anvin
2025-04-25 21:54 ` Arnd Bergmann
2025-04-27 9:25 ` Ingo Molnar
2025-04-27 17:32 ` Arnd Bergmann
2025-04-27 21:26 ` H. Peter Anvin
2025-04-28 9:16 ` Ingo Molnar
2025-04-28 11:21 ` Arnd Bergmann
2025-04-29 10:22 ` Ingo Molnar
2025-04-29 12:10 ` Arnd Bergmann
2025-04-27 8:15 ` Ingo Molnar
2025-04-25 8:42 ` [PATCH 14/15] x86/percpu: Remove !CONFIG_X86_CX8 methods Ingo Molnar
2025-04-25 14:05 ` Uros Bizjak
2025-04-27 7:46 ` [PATCH -v2 " Ingo Molnar
2025-04-25 8:42 ` [PATCH 15/15] x86/atomics: " Ingo Molnar
2025-04-25 13:55 ` Arnd Bergmann
2025-04-25 14:10 ` Uros Bizjak
2025-04-25 15:00 ` Brian Gerst
2025-04-27 8:23 ` Ingo Molnar
2025-04-27 8:26 ` Ingo Molnar
2025-04-27 10:31 ` Uros Bizjak
2025-05-15 8:49 ` Ingo Molnar
2025-04-25 11:13 ` [RFC PATCH 0/15] x86: Remove support for TSC-less and CX8-less CPUs Arnd Bergmann
2025-04-26 8:26 ` Pavel Machek
2025-05-05 8:53 ` Maciej W. Rozycki
2025-05-05 12:48 ` H. Peter Anvin
2025-05-05 13:04 ` Maciej W. Rozycki
2025-05-05 19:57 ` H. Peter Anvin
2025-05-05 20:54 ` Borislav Petkov
2025-05-06 13:51 ` Maciej W. Rozycki
2025-05-06 14:16 ` Borislav Petkov
2025-05-08 14:51 ` Maciej W. Rozycki
2025-05-08 20:11 ` Borislav Petkov
2025-05-12 12:55 ` Maciej W. Rozycki
2025-05-12 13:48 ` Borislav Petkov
2025-05-12 17:29 ` Maciej W. Rozycki
2025-05-13 2:00 ` Linus Torvalds
2025-05-13 3:48 ` H. Peter Anvin
2025-05-13 5:43 ` John Paul Adrian Glaubitz
2025-05-13 21:55 ` Maciej W. Rozycki
2025-05-13 22:02 ` Linus Torvalds
2025-05-13 22:06 ` H. Peter Anvin
2025-05-15 16:32 ` Maciej W. Rozycki
2025-05-06 13:48 ` Maciej W. Rozycki
2025-05-06 13:54 ` John Paul Adrian Glaubitz
2025-05-05 15:59 ` Linus Torvalds
2025-05-06 13:53 ` Maciej W. Rozycki
2025-05-06 16:44 ` H. Peter Anvin
2025-05-06 17:11 ` Linus Torvalds
2025-05-06 17:51 ` H. Peter Anvin
2025-05-08 14:54 ` Maciej W. Rozycki
2025-05-08 14:53 ` Maciej W. Rozycki
2025-05-08 14:51 ` Maciej W. Rozycki
2025-05-15 8:56 [PATCH -v2 " Ingo Molnar
2025-05-15 8:56 ` [PATCH 02/15] x86/cpu: Remove CONFIG_MWINCHIP3D/MWINCHIPC6 Ingo Molnar
2025-12-14 8:46 [PATCH -v3 0/15] x86: Remove support for TSC-less and CX8-less CPUs Ingo Molnar
2025-12-14 8:46 ` [PATCH 02/15] x86/cpu: Remove CONFIG_MWINCHIP3D/MWINCHIPC6 Ingo Molnar
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