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Tue, 29 Apr 2025 02:15:18 -0700 (PDT) Date: Tue, 29 Apr 2025 11:15:18 +0200 From: Andrew Jones To: Atish Patra Cc: Anup Patel , Atish Patra , Paolo Bonzini , Shuah Khan , Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 3/3] KVM: riscv: selftests: Add vector extension tests Message-ID: <20250429-251342442ffe2d05e6b676e1@orel> References: <20250324-kvm_selftest_improve-v1-0-583620219d4f@rivosinc.com> <20250324-kvm_selftest_improve-v1-3-583620219d4f@rivosinc.com> <20250425-a2a40c6296018326cdcf7d24@orel> <30b2d279-8459-4a72-aad4-29c1ece622b8@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <30b2d279-8459-4a72-aad4-29c1ece622b8@linux.dev> On Mon, Apr 28, 2025 at 05:32:09PM -0700, Atish Patra wrote: > > On 4/25/25 7:20 AM, Andrew Jones wrote: > > On Mon, Mar 24, 2025 at 05:40:31PM -0700, Atish Patra wrote: > > > Add vector related tests with the ISA extension standard template. > > > However, the vector registers are bit tricky as the register length is > > > variable based on vlenb value of the system. That's why the macros are > > > defined with a default and overidden with actual value at runtime. > > > > > > Signed-off-by: Atish Patra > > > --- > > > tools/testing/selftests/kvm/riscv/get-reg-list.c | 111 ++++++++++++++++++++++- > > > 1 file changed, 110 insertions(+), 1 deletion(-) > > > > > > diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c > > > index 8515921dfdbf..576ab8eb7368 100644 > > > --- a/tools/testing/selftests/kvm/riscv/get-reg-list.c > > > +++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c > > > @@ -145,7 +145,9 @@ void finalize_vcpu(struct kvm_vcpu *vcpu, struct vcpu_reg_list *c) > > > { > > > unsigned long isa_ext_state[KVM_RISCV_ISA_EXT_MAX] = { 0 }; > > > struct vcpu_reg_sublist *s; > > > - uint64_t feature; > > > + uint64_t feature = 0; > > > + u64 reg, size; > > > + unsigned long vlenb_reg; > > > int rc; > > > for (int i = 0; i < KVM_RISCV_ISA_EXT_MAX; i++) > > > @@ -173,6 +175,23 @@ void finalize_vcpu(struct kvm_vcpu *vcpu, struct vcpu_reg_list *c) > > > switch (s->feature_type) { > > > case VCPU_FEATURE_ISA_EXT: > > > feature = RISCV_ISA_EXT_REG(s->feature); > > > + if (s->feature == KVM_RISCV_ISA_EXT_V) { > > > + /* Enable V extension so that we can get the vlenb register */ > > > + __vcpu_set_reg(vcpu, feature, 1); > > We probably want to bail here if __vcpu_set_reg returns an error. > > > Sure. What do you mean by bail here ? > Continue to the next reg or just assert if it returns error. Continue to the next sublist, but now that I think of it, let's keep this line as it is and either add a __TEST_REQUIRE(__vcpu_has_ext(vcpu, feature), "%s not available, skipping tests", s->name); continue; after it. Or, add a label to the __TEST_REQUIRE already at the bottom of the loop and then goto that. Thanks, drew