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Tue, 6 May 2025 13:41:52 +0200 From: Daniel Schultz To: , , , , , , , , CC: , Daniel Schultz Subject: [PATCH v2 1/2] arm64: dts: ti: k3-am62a: Enable CPU freq throttling on thermal alert Date: Tue, 6 May 2025 04:41:33 -0700 Message-ID: <20250506114134.3514899-1-d.schultz@phytec.de> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: Diagnostix.phytec.de (172.25.0.14) To Florix.phytec.de (172.25.0.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU6PEPF0000A7DE:EE_|AM8P195MB1009:EE_ X-MS-Office365-Filtering-Correlation-Id: 6ed69e32-2724-41ee-d039-08dd8c930083 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?Ry1hUcdN/9yFwgTgKSp6OOoLGj/9QZy1u1FuCjo8T+DlIZRtLE1GEAC3U0Bc?= =?us-ascii?Q?ukUWx7ZhoNGJgorg5fOnCIaFV+DdBGbfQrrT85HSvD1cBi3/TfOQKuWvUEQu?= =?us-ascii?Q?6KhGx79CoxhLrbneVUpUFIQJJOHuyeSV+KwwXgC1cLg+Owmkhao56PgUrDot?= =?us-ascii?Q?5e3JD2YwuuDsOP6XbLqTJYJXLgS6co5pM2ENccX/AHSL5/H8YshKLnLOREEq?= =?us-ascii?Q?AYelvLPMxx3n6+E1QrC/xNodLwLxw35TGpLrWs1aWmAV67CeDIrxMo95Crpf?= =?us-ascii?Q?U13wQ4TNzlttb1CNXYq53As8IP8BXW1dIcbO5NPgrwSuVfwY5KSOHCvyrm41?= =?us-ascii?Q?sfTKlmz+Hbt338FHYBtLF9L7M+LxRVfoFdV3xeiB6hv9hdFsAQtM6hsvWlj3?= =?us-ascii?Q?1/aS4xacnG7RkMej133n+jjmt4aDHzHW+Ohl4yKCL+7aCCgxp5ijU/CmsjIB?= =?us-ascii?Q?gnW9hY5NAPul6+BAKsAcg7RIVi84LyZm/olVqc6R0VrSLrxciKBKcLr+5Ej1?= =?us-ascii?Q?BBLTL4n+yWwX3/KAY36g4P5av3R6wKEtxE6amoudrYQHwYiH0GdTaiJ6oc/U?= =?us-ascii?Q?iUWyQzBZOJ9XgZtC7lILBzhPCXDbnt01ykyIjd4/PGjCj0o6/x5HEE7hfX/h?= =?us-ascii?Q?bdK5YWynjyDWbOTkpwuY+tsz3H1uVsGya3Cnj2+pYZ3nMkh2xOsRMh8Kh3rT?= =?us-ascii?Q?rW9HfEYRi5uJZ4KuGSG4WtXcOZXf38uH5WBSfnEWC3g8sb0gFZzFRU2OUJ3W?= =?us-ascii?Q?mv/TGmOeCB2cduD/Ped99HFl+zsLbFKYZrU8Y5g9kEybsavPzf8kTWh1tHlI?= =?us-ascii?Q?6YF5Znm8x1cPnrzSrKvWKnz1MWjXcolMYh6Y44K4BuqBkVQK8umvr0FnI4xQ?= =?us-ascii?Q?26sb+qjR1eBJq1KpBkLxdiD+gPnFxwUa8fXOiYxaaeKnLYJ8J2u7Vzjj78zj?= =?us-ascii?Q?Q2O5FtGJAZRXhRPAayjaAScZk6HiM9a8bwftZNYgaaXbzFULk7+YKRtUCkQF?= =?us-ascii?Q?dQkWdN+eUz81sXKK/pPdObpXJgT+wAdOVOgYQtchaiL2G7tRkhNY1kqnkMB/?= =?us-ascii?Q?y7RHCBtGojkfu/KtQpmRT+YVuAZ+/7mS2058VTC2gR67aKPHxPnjydlsYqp3?= =?us-ascii?Q?0gI34aWflb3hiHroruYwfpFpCgc4pQRJUdDeBUrMwo6mqdvsQSKZBrDBrp0N?= =?us-ascii?Q?TFeq7sqoIuLVlCb4EwH03PklLIiBBAPXSAE7IKDjrU1KrfxaIunsLJ8wL2YZ?= =?us-ascii?Q?kJ+mDEl9IWMc1knZxiK60IvnuRcO667ZVJMHycwZX6P8FxVimuFjIF1DCWl3?= =?us-ascii?Q?/DZd076/3Qbb0CTPtzt6+6ACzNF+3UORt1OSeH/YhOBzUW+92t6oc2RZsaOH?= =?us-ascii?Q?B2/WT/6Th1UqYi4MjxdpfhEgFaDVvUdwwoAQpTWiVGIREX791cLDQ1IQ1cgf?= =?us-ascii?Q?gr5Oe6dYdOVDNCrpcfIUCdIUUeE5l0jKVqB5KfnomNxv0w9SITS+Gjvkt2ty?= =?us-ascii?Q?O9Lx3pkfBa7KXmmewk5D6JWEvaDvkDR6LoZk?= X-Forefront-Antispam-Report: CIP:91.26.50.189;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:Diagnostix.phytec.de;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(36860700013)(82310400026)(1800799024);DIR:OUT;SFP:1102; X-OriginatorOrg: phytec.de X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2025 11:41:55.2501 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6ed69e32-2724-41ee-d039-08dd8c930083 X-MS-Exchange-CrossTenant-Id: e609157c-80e2-446d-9be3-9c99c2399d29 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e609157c-80e2-446d-9be3-9c99c2399d29;Ip=[91.26.50.189];Helo=[Diagnostix.phytec.de] X-MS-Exchange-CrossTenant-AuthSource: DU6PEPF0000A7DE.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8P195MB1009 Enable throttling down the CPU frequency when an alert temperature threshold (lower than the critical threshold) is reached. Signed-off-by: Daniel Schultz --- Changes in v2: * Increased passive trip point to 115C (10C below crit) * Dropped patch which decreased critical trip point. arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi | 57 ++++++++++++++++++-- arch/arm64/boot/dts/ti/k3-am62a7.dtsi | 4 ++ 2 files changed, 58 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi index c7486fb2a5b4..3aa127157d24 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi @@ -12,12 +12,29 @@ main0_thermal: main0-thermal { thermal-sensors = <&wkup_vtm0 0>; trips { + main0_alert: main0-alert { + temperature = <115000>; + hysteresis = <2000>; + type = "passive"; + }; + main0_crit: main0-crit { temperature = <125000>; /* milliCelsius */ hysteresis = <2000>; /* milliCelsius */ type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&main0_alert>; + cooling-device = + <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; main1_thermal: main1-thermal { @@ -26,25 +43,59 @@ main1_thermal: main1-thermal { thermal-sensors = <&wkup_vtm0 1>; trips { + main1_alert: main1-alert { + temperature = <115000>; + hysteresis = <2000>; + type = "passive"; + }; + main1_crit: main1-crit { temperature = <125000>; /* milliCelsius */ hysteresis = <2000>; /* milliCelsius */ type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&main1_alert>; + cooling-device = + <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; main2_thermal: main2-thermal { - polling-delay-passive = <250>; /* milliSeconds */ - polling-delay = <500>; /* milliSeconds */ - thermal-sensors = <&wkup_vtm0 2>; + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&wkup_vtm0 2>; trips { + main2_alert: main2-alert { + temperature = <115000>; + hysteresis = <2000>; + type = "passive"; + }; + main2_crit: main2-crit { temperature = <125000>; /* milliCelsius */ hysteresis = <2000>; /* milliCelsius */ type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&main2_alert>; + cooling-device = + <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62a7.dtsi b/arch/arm64/boot/dts/ti/k3-am62a7.dtsi index 6c99221beb6b..b6e5eee99370 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a7.dtsi @@ -50,6 +50,7 @@ cpu0: cpu@0 { next-level-cache = <&L2_0>; operating-points-v2 = <&a53_opp_table>; clocks = <&k3_clks 135 0>; + #cooling-cells = <2>; }; cpu1: cpu@1 { @@ -66,6 +67,7 @@ cpu1: cpu@1 { next-level-cache = <&L2_0>; operating-points-v2 = <&a53_opp_table>; clocks = <&k3_clks 136 0>; + #cooling-cells = <2>; }; cpu2: cpu@2 { @@ -82,6 +84,7 @@ cpu2: cpu@2 { next-level-cache = <&L2_0>; operating-points-v2 = <&a53_opp_table>; clocks = <&k3_clks 137 0>; + #cooling-cells = <2>; }; cpu3: cpu@3 { @@ -98,6 +101,7 @@ cpu3: cpu@3 { next-level-cache = <&L2_0>; operating-points-v2 = <&a53_opp_table>; clocks = <&k3_clks 138 0>; + #cooling-cells = <2>; }; }; -- 2.25.1