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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 May 2025 07:22:55.3313 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c25f4349-ec48-486f-1823-08dd92b8254a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B077.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7294 Change reg parameter of apic_{set|get}_*() to unsigned int to optimize code generation. On gcc-14.2, code generation for apic_get_reg() is show below. * Without change: apic_get_reg: 48 63 f6 movsxd rsi,esi 8b 04 37 mov eax,DWORD PTR [rdi+rsi*1] c3 ret * With change: 89 f6 mov esi,esi 8b 04 37 mov eax,DWORD PTR [rdi+rsi*1] c3 ret Signed-off-by: Neeraj Upadhyay --- Changes since v5: - New change. arch/x86/include/asm/apic.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index 2acf695ed1b7..b377718d34d3 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -525,23 +525,23 @@ static inline int apic_find_highest_vector(void *bitmap) return -1; } -static inline u32 apic_get_reg(char *regs, int reg) +static inline u32 apic_get_reg(char *regs, unsigned int reg) { return *((u32 *) (regs + reg)); } -static inline void apic_set_reg(char *regs, int reg, u32 val) +static inline void apic_set_reg(char *regs, unsigned int reg, u32 val) { *((u32 *) (regs + reg)) = val; } -static __always_inline u64 apic_get_reg64(char *regs, int reg) +static __always_inline u64 apic_get_reg64(char *regs, unsigned int reg) { BUILD_BUG_ON(reg != APIC_ICR); return *((u64 *) (regs + reg)); } -static __always_inline void apic_set_reg64(char *regs, int reg, u64 val) +static __always_inline void apic_set_reg64(char *regs, unsigned int reg, u64 val) { BUILD_BUG_ON(reg != APIC_ICR); *((u64 *) (regs + reg)) = val; -- 2.34.1