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Thu, 15 May 2025 20:05:36 -0700 (PDT) Received: from cyan-mbp.internal.sifive.com ([136.226.240.168]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-231d4ebb084sm4804405ad.201.2025.05.15.20.05.33 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 15 May 2025 20:05:35 -0700 (PDT) From: Cyan Yang To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, corbet@lwn.net, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, samuel.holland@sifive.com Cc: linux-doc@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Cyan Yang Subject: [PATCH v2 00/12] riscv: Add vendor extensions support for SiFive Date: Fri, 16 May 2025 11:02:58 +0800 Message-Id: <20250516030310.16950-1-cyan.yang@sifive.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This patch set adds four vendor-specific ISA extensions from SiFive: "xsfvqmaccdod", "xsfvqmaccqoq", "xsfvfnrclipxfqf", and "xsfvfwmaccqqq". Additionally, a new hwprobe key, RISCV_HWPROBE_KEY_VENDOR_EXT_SIFIVE_0, has been added to query which SiFive vendor extensions are supported on the current platform. Signed-off-by: Cyan Yang --- Changes in v2: - Fixed a sparse warning - Link to v1: https://lore.kernel.org/r/20250418053239.4351-1-cyan.yang@sifive.com --- Cyan Yang (12): dt-bindings: riscv: Add xsfvqmaccdod and xsfvqmaccqoq ISA extension description riscv: Add SiFive xsfvqmaccdod and xsfvqmaccqoq vendor extensions riscv: hwprobe: Document SiFive xsfvqmaccdod and xsfvqmaccqoq vendor extensions riscv: hwprobe: Add SiFive vendor extension support and probe for xsfqmaccdod and xsfqmaccqoq dt-bindings: riscv: Add xsfvfnrclipxfqf ISA extension description riscv: Add SiFive xsfvfnrclipxfqf vendor extension riscv: hwprobe: Document SiFive xsfvfnrclipxfqf vendor extension riscv: hwprobe: Add SiFive xsfvfnrclipxfqf vendor extension dt-bindings: riscv: Add xsfvfwmaccqqq ISA extension description riscv: Add SiFive xsfvfwmaccqqq vendor extension riscv: hwprobe: Document SiFive xsfvfwmaccqqq vendor extension riscv: hwprobe: Add SiFive xsfvfwmaccqqq vendor extension Documentation/arch/riscv/hwprobe.rst | 22 ++++++++++++++++ .../devicetree/bindings/riscv/extensions.yaml | 25 +++++++++++++++++++ arch/riscv/Kconfig.vendor | 13 ++++++++++ arch/riscv/include/asm/hwprobe.h | 3 ++- .../include/asm/vendor_extensions/sifive.h | 16 ++++++++++++ .../asm/vendor_extensions/sifive_hwprobe.h | 19 ++++++++++++++ arch/riscv/include/uapi/asm/hwprobe.h | 1 + arch/riscv/include/uapi/asm/vendor/sifive.h | 6 +++++ arch/riscv/kernel/sys_hwprobe.c | 5 ++++ arch/riscv/kernel/vendor_extensions.c | 10 ++++++++ arch/riscv/kernel/vendor_extensions/Makefile | 2 ++ arch/riscv/kernel/vendor_extensions/sifive.c | 21 ++++++++++++++++ .../kernel/vendor_extensions/sifive_hwprobe.c | 22 ++++++++++++++++ 13 files changed, 164 insertions(+), 1 deletion(-) create mode 100644 arch/riscv/include/asm/vendor_extensions/sifive.h create mode 100644 arch/riscv/include/asm/vendor_extensions/sifive_hwprobe.h create mode 100644 arch/riscv/include/uapi/asm/vendor/sifive.h create mode 100644 arch/riscv/kernel/vendor_extensions/sifive.c create mode 100644 arch/riscv/kernel/vendor_extensions/sifive_hwprobe.c -- 2.39.5 (Apple Git-154)