From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 538421DE4C8; Tue, 20 May 2025 14:26:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747751171; cv=none; b=PswTfNtJZnRBBWkyl+LJdyhnI2dF3ZDX1qZjPjjM2qQZWbTINVmuk64qfzCAzbO7mTGdF0GJlkz7dBPkNNa/G6e+rY8MQfFrTXewvYGzH8LFIQNzvvIWUBBFEi4qfKpfdm4qvztzVuToSY6PsssoA9K6fB05u83sQlGP0UAxSJM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747751171; c=relaxed/simple; bh=7ulwypwJJ5Y11qeYAI4E5zzbs2+20sESyLFc+V69als=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=T9GXqfBKcmlPi4NgwRcjwZUBnB498sc02GBFJFSOR/PukRpdxB8Ja1VGALHJn43O2jFy7m8tV1yJr68fVrXdDE9Bsb70jonQrApR7cySt1NURtF23ye9wFxmbu8QaRxb/7gNNlsmZjF8cQ5uJj45ecEurIJeEF2m0fysULyRw34= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=O0pHPqMC; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="O0pHPqMC" Received: from pendragon.ideasonboard.com (179.218-130-109.adsl-dyn.isp.belgacom.be [109.130.218.179]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id A6B8F2EC; Tue, 20 May 2025 16:25:47 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1747751147; bh=7ulwypwJJ5Y11qeYAI4E5zzbs2+20sESyLFc+V69als=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=O0pHPqMCOcxnGJSnAo+O5VnqA122+DeVV9m1qoqKaFT5rKyyJozNqRl85bWQ6KxqE EDHshQUO+V6ApK3dIzvxdtWzD6ithBq7iP7/IYOdTlV0YaX9frCeFnuZIK5eGqrTYM wyT3rwzpbjXHTvcH3aVTr46/16ldZhAN3tI7FUW4= Date: Tue, 20 May 2025 16:26:02 +0200 From: Laurent Pinchart To: Prabhakar Cc: Biju Das , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Geert Uytterhoeven , Magnus Damm , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Fabrizio Castro , Lad Prabhakar Subject: Re: [PATCH v5 09/12] drm: renesas: rz-du: mipi_dsi: Add feature flag for 16BPP support Message-ID: <20250520142602.GH13321@pendragon.ideasonboard.com> References: <20250512182330.238259-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20250512182330.238259-10-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20250512182330.238259-10-prabhakar.mahadev-lad.rj@bp.renesas.com> Hi Prabhakar, Thank you for the patch. On Mon, May 12, 2025 at 07:23:27PM +0100, Prabhakar wrote: > From: Lad Prabhakar > > Introduce the `RZ_MIPI_DSI_FEATURE_16BPP` flag in `rzg2l_mipi_dsi_hw_info` > to indicate support for 16BPP pixel formats. The RZ/V2H(P) SoC supports > 16BPP, whereas this feature is missing on the RZ/G2L SoC. > > Update the `mipi_dsi_host_attach()` function to check this flag before > allowing 16BPP formats. If the SoC does not support 16BPP, return an error > to prevent incorrect format selection. > > This change enables finer-grained format support control for different > SoC variants. > > Co-developed-by: Fabrizio Castro > Signed-off-by: Fabrizio Castro > Signed-off-by: Lad Prabhakar > Reviewed-by: Biju Das Reviewed-by: Laurent Pinchart > --- > v4->v5: > - Updated RZ_MIPI_DSI_FEATURE_16BPP macro to use BIT(0) > - Added Reviewed tag from Biju > > v3->v4: > - No changes > > v2->v3: > - No changes > > v1->v2: > - Renamed RZ_MIPI_DSI_FEATURE_16BPP > --- > drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c > index f93519613662..55a1c1b043c8 100644 > --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c > +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c > @@ -28,6 +28,8 @@ > > #include "rzg2l_mipi_dsi_regs.h" > > +#define RZ_MIPI_DSI_FEATURE_16BPP BIT(0) > + > struct rzg2l_mipi_dsi; > > struct rzg2l_mipi_dsi_hw_info { > @@ -37,6 +39,7 @@ struct rzg2l_mipi_dsi_hw_info { > u32 link_reg_offset; > unsigned long max_dclk; > unsigned long min_dclk; > + u8 features; > }; > > struct rzg2l_mipi_dsi { > @@ -643,8 +646,16 @@ static int rzg2l_mipi_dsi_host_attach(struct mipi_dsi_host *host, > > switch (mipi_dsi_pixel_format_to_bpp(device->format)) { > case 24: > + break; > case 18: > break; > + case 16: > + if (!(dsi->info->features & RZ_MIPI_DSI_FEATURE_16BPP)) { > + dev_err(dsi->dev, "Unsupported format 0x%04x\n", > + device->format); > + return -EINVAL; > + } > + break; > default: > dev_err(dsi->dev, "Unsupported format 0x%04x\n", device->format); > return -EINVAL; -- Regards, Laurent Pinchart