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Sun, 08 Jun 2025 16:29:42 -0700 (PDT) Received: from localhost ([2001:da8:7001:11::cb]) by smtp.gmail.com with UTF8SMTPSA id 6a1803df08f44-6fb09ac85a8sm43748866d6.35.2025.06.08.16.29.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Jun 2025 16:29:42 -0700 (PDT) From: Inochi Amaoto To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Chen Wang , Inochi Amaoto , Richard Cochran , Longbin Li Cc: Han Gao , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, sophgo@lists.linux.dev, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Yixun Lan Subject: [PATCH 00/11] riscv: sophgo: sg2044: add DTS support for all available devices Date: Mon, 9 Jun 2025 07:28:24 +0800 Message-ID: <20250608232836.784737-1-inochiama@gmail.com> X-Mailer: git-send-email 2.49.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit As the clock driver for SG2044 got merged, it is possible to add dts node for all support devices of SG2044. Inochi Amaoto (9): riscv: dts: sophgo: sg2044: Add system controller device riscv: dts: sophgo: sg2044: Add clock controller device riscv: dts: sophgo: sg2044: Add GPIO device riscv: dts: sophgo: sg2044: Add I2C device riscv: dts: sophgo: sg2044: add DMA controller device riscv: dts: sophgo: sg2044: Add MMC controller device riscv: dts: sophgo: sophgo-srd3-10: add HWMON MCU device riscv: dts: sophgo: sg2044: Add ethernet control device riscv: dts: sophgo: sg2044: Add pinctrl device Longbin Li (2): riscv: dts: sophgo: add SG2044 SPI NOR controller driver riscv: dts: sophgo: add pwm controller for SG2044 .../boot/dts/sophgo/sg2044-sophgo-srd3-10.dts | 48 +++ arch/riscv/boot/dts/sophgo/sg2044.dtsi | 313 ++++++++++++++++++ 2 files changed, 361 insertions(+) -- 2.49.0