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Thu, 12 Jun 2025 23:57:54 -0700 (PDT) From: Anup Patel To: Atish Patra Cc: Palmer Dabbelt , Paul Walmsley , Alexandre Ghiti , Andrew Jones , Anup Patel , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel Subject: [PATCH v2 00/12] MMU related improvements for KVM RISC-V Date: Fri, 13 Jun 2025 12:27:31 +0530 Message-ID: <20250613065743.737102-1-apatel@ventanamicro.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This series primarily has various MMU improvements for KVM RISC-V and it also serves as a preparatory series for the upcoming nested virtualization support. PATCH1 to PATCH2: SBI spec related fixes in SBI RFENCE extension PATCH3 to PATCH6: Few cosmetic improvements PATCH7 to PATCH8: TLB maintenance related improvements PATCH9 to PATCH13: MMU related preparatory work for nested virtualization These patches can also be found in the riscv_kvm_mmu_imp_v2 branch at: https://github.com/avpatel/linux.git Changes since v1: - Rebased upon Linux-6.16-rc1 - Dropped PATCH1 and PATCH2 of v1 series since these are queued as fixes for Linux-6.16 - Addressed Atish's comment on PATCH1 in this series - Added new PATCH7 in this series Anup Patel (12): RISC-V: KVM: Check kvm_riscv_vcpu_alloc_vector_context() return value RISC-V: KVM: Drop the return value of kvm_riscv_vcpu_aia_init() RISC-V: KVM: Rename and move kvm_riscv_local_tlb_sanitize() RISC-V: KVM: Replace KVM_REQ_HFENCE_GVMA_VMID_ALL with KVM_REQ_TLB_FLUSH RISC-V: KVM: Don't flush TLB when PTE is unchanged RISC-V: KVM: Implement kvm_arch_flush_remote_tlbs_range() RISC-V: KVM: Use ncsr_xyz() in kvm_riscv_vcpu_trap_redirect() RISC-V: KVM: Factor-out MMU related declarations into separate headers RISC-V: KVM: Introduce struct kvm_gstage_mapping RISC-V: KVM: Add vmid field to struct kvm_riscv_hfence RISC-V: KVM: Factor-out g-stage page table management RISC-V: KVM: Pass VMID as parameter to kvm_riscv_hfence_xyz() APIs arch/riscv/include/asm/kvm_aia.h | 2 +- arch/riscv/include/asm/kvm_gstage.h | 72 ++++ arch/riscv/include/asm/kvm_host.h | 103 +----- arch/riscv/include/asm/kvm_mmu.h | 21 ++ arch/riscv/include/asm/kvm_tlb.h | 84 +++++ arch/riscv/include/asm/kvm_vmid.h | 27 ++ arch/riscv/kvm/Makefile | 1 + arch/riscv/kvm/aia_device.c | 6 +- arch/riscv/kvm/aia_imsic.c | 12 +- arch/riscv/kvm/gstage.c | 338 +++++++++++++++++++ arch/riscv/kvm/main.c | 3 +- arch/riscv/kvm/mmu.c | 499 ++++++---------------------- arch/riscv/kvm/tlb.c | 110 +++--- arch/riscv/kvm/vcpu.c | 26 +- arch/riscv/kvm/vcpu_exit.c | 20 +- arch/riscv/kvm/vcpu_sbi_replace.c | 17 +- arch/riscv/kvm/vcpu_sbi_v01.c | 25 +- arch/riscv/kvm/vm.c | 7 +- arch/riscv/kvm/vmid.c | 25 ++ 19 files changed, 795 insertions(+), 603 deletions(-) create mode 100644 arch/riscv/include/asm/kvm_gstage.h create mode 100644 arch/riscv/include/asm/kvm_mmu.h create mode 100644 arch/riscv/include/asm/kvm_tlb.h create mode 100644 arch/riscv/include/asm/kvm_vmid.h create mode 100644 arch/riscv/kvm/gstage.c -- 2.43.0