From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 283B620E005; Mon, 23 Jun 2025 08:10:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750666206; cv=none; b=BPREDsTH0PrlAHrHgyaGys1eDN0m3qmL2bK6yW7dcO3uGuPlWoe2r5aIIPiGv9YeeoIUcsr6E32C68NR3sLQ95Mic+DnNO5O95Is88qVLppaIFaShnQc2dPDlOVHpF0dJ4zBDYAovcQ1lkEEpuKGYlyGvJCg8Jj5MY3apFln6QU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750666206; c=relaxed/simple; bh=LHjaOxQCCmOqCb0BNa1AEbs2pvRMQ7V7oDWIHuI2aYQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=nVZrIx3XsHr5WetrDvu1LhcUJMbDRNXjNup8A3uindje19wXDn2b3r88Wx7/iiLiSkmLOiuN4tPhgyvCodWEBnjmd1f9/UH7Ult8/oNnEW9EGAeHEWZ0Z+o0LyAZPrf6RhXdxUyl3tGddwUBh17dzaTBTmHWoSJWtsYX6UPIOTs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-CSE-ConnectionGUID: pDikAHcWRF+Tj0fp5tqWNw== X-CSE-MsgGUID: FLrClAvMQmefBEod9XJgmA== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 23 Jun 2025 17:04:55 +0900 Received: from ubuntu.adwin.renesas.com (unknown [10.226.93.157]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 1603E400F744; Mon, 23 Jun 2025 17:04:50 +0900 (JST) From: John Madieu To: geert+renesas@glider.be, magnus.damm@gmail.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, richardcochran@gmail.com Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, netdev@vger.kernel.org, biju.das.jz@bp.renesas.com, John Madieu Subject: [PATCH v3 3/3] arm64: dts: renesas: rzg3e-smarc-som: Enable eth{0-1} (GBETH) interfaces Date: Mon, 23 Jun 2025 10:04:05 +0200 Message-ID: <20250623080405.355083-4-john.madieu.xa@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250623080405.355083-1-john.madieu.xa@bp.renesas.com> References: <20250623080405.355083-1-john.madieu.xa@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Enable the Gigabit Ethernet Interfaces (GBETH) populated on the RZ/G3E SMARC EVK Reviewed-by: Biju Das Tested-by: Biju Das Reviewed-by: Geert Uytterhoeven Signed-off-by: John Madieu --- Changes: v2: No changes but resending without dt-bindings patch v3: Updates mdio separately, based on phandles instead of node redefinition .../boot/dts/renesas/rzg3e-smarc-som.dtsi | 98 +++++++++++++++++++ 1 file changed, 98 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi index f99a09d04ddd..2281ec05c1f5 100644 --- a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi @@ -26,6 +26,8 @@ / { compatible = "renesas,rzg3e-smarcm", "renesas,r9a09g047e57", "renesas,r9a09g047"; aliases { + ethernet0 = ð0; + ethernet1 = ð1; i2c2 = &i2c2; mmc0 = &sdhi0; mmc2 = &sdhi2; @@ -77,6 +79,24 @@ &audio_extal_clk { clock-frequency = <48000000>; }; +ð0 { + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + + pinctrl-0 = <ð0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +ð1 { + phy-handle = <&phy1>; + phy-mode = "rgmii-id"; + + pinctrl-0 = <ð1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + &gpu { status = "okay"; mali-supply = <®_vdd0p8v_others>; @@ -102,7 +122,85 @@ raa215300: pmic@12 { }; }; +&mdio0 { + phy0: ethernet-phy@7 { + compatible = "ethernet-phy-id0022.1640", + "ethernet-phy-ieee802.3-c22"; + reg = <7>; + interrupts-extended = <&icu 3 IRQ_TYPE_LEVEL_LOW>; + rxc-skew-psec = <1400>; + txc-skew-psec = <1400>; + rxdv-skew-psec = <0>; + txdv-skew-psec = <0>; + rxd0-skew-psec = <0>; + rxd1-skew-psec = <0>; + rxd2-skew-psec = <0>; + rxd3-skew-psec = <0>; + txd0-skew-psec = <0>; + txd1-skew-psec = <0>; + txd2-skew-psec = <0>; + txd3-skew-psec = <0>; + }; +}; + +&mdio1 { + phy1: ethernet-phy@7 { + compatible = "ethernet-phy-id0022.1640", + "ethernet-phy-ieee802.3-c22"; + reg = <7>; + interrupts-extended = <&icu 16 IRQ_TYPE_LEVEL_LOW>; + rxc-skew-psec = <1400>; + txc-skew-psec = <1400>; + rxdv-skew-psec = <0>; + txdv-skew-psec = <0>; + rxd0-skew-psec = <0>; + rxd1-skew-psec = <0>; + rxd2-skew-psec = <0>; + rxd3-skew-psec = <0>; + txd0-skew-psec = <0>; + txd1-skew-psec = <0>; + txd2-skew-psec = <0>; + txd3-skew-psec = <0>; + }; +}; + &pinctrl { + eth0_pins: eth0 { + pinmux = , /* MDC */ + , /* MDIO */ + , /* PHY_INTR (IRQ2) */ + , /* RXD3 */ + , /* RXD2 */ + , /* RXD1 */ + , /* RXD0 */ + , /* RXC */ + , /* RX_CTL */ + , /* TXD3 */ + , /* TXD2 */ + , /* TXD1 */ + , /* TXD0 */ + , /* TXC */ + ; /* TX_CTL */ + }; + + eth1_pins: eth1 { + pinmux = , /* MDC */ + , /* MDIO */ + , /* PHY_INTR (IRQ15) */ + , /* RXD3 */ + , /* RXD2 */ + , /* RXD1 */ + , /* RXD0 */ + , /* RXC */ + , /* RX_CTL */ + , /* TXD3 */ + , /* TXD2 */ + , /* TXD1 */ + , /* TXD0 */ + , /* TXC */ + ; /* TX_CTL */ + }; + i2c2_pins: i2c { pinmux = , /* SCL2 */ ; /* SDA2 */ -- 2.25.1