From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DE3521DB958; Wed, 25 Jun 2025 07:34:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750836868; cv=none; b=plAcxfBZAVY6LFvtpEiljZQe7wufb+I/bzQv8UnLPjOUHRSWFvGIYrNPzfeetjTnR64rquxMyWbGbgje3SW9Qr2WZCIZMNYKOr1e1/nVkxiTvdg3MLWQGndrBoGfPiH4DiUb2W8CDac/oQPl2xLwgBlDknyW2gGA4U+L2lIimX0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750836868; c=relaxed/simple; bh=pFGAiFD7LUEJrgd8t0OpEUTJgUbOH8Ykp9q5zrIdDUU=; h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type; b=gjHqt7Lx28qHVtqpSKYbml3KpBM++eyYA9Q9PGTjjVTZUCobHHkgmT1AFJER40EPGvRl0S39aQuRiJXXgEQ1pUYiOfkyMkzEoMd3VKV4/q5sG1vFbHFjdkM9c8Kpf38gIXOL5o1fvAi2oADssgg6fO5hbRl7gnfliFquhSbl0Y8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 25 Jun 2025 15:34:18 +0800 Received: from mail.aspeedtech.com (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 25 Jun 2025 15:34:17 +0800 From: Jammy Huang To: , , , , , , , , , Subject: [PATCH v5 0/2] ASPEED: Add mailbox driver for AST2700 series Date: Wed, 25 Jun 2025 15:34:15 +0800 Message-ID: <20250625073417.2395037-1-jammy_huang@aspeedtech.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Add mailbox controller driver for AST27XX SoCs, which provides independent tx/rx mailbox between different processors. There are 4 channels for each tx/rx mailbox and each channel has an 32-byte FIFO. v5 changes: - Update document 1. Separate reg from 1 to 2. 1st is tx controller; 2nd is rx. 2. Remove 'Reviewed-by' since the patch has changed. - Update driver, no functional changes. 1. Update since there is 2 reg base now. 2. Refine reg definitions 3. Add spinlock to protect registers 4. Use bool as return value for ast2700_mbox_tx_done 5. Rename variable from drv_data to dev_data. v4 changes: - Update driver, no functional changes. 1. Remove unused variable, rx_buff, in struct ast2700_mbox. 2. Remove unneeded cast on device_get_match_data. 3. Remove the usage of writel/readl_relaxed. 4. Improve readability. v3 changes: - Correct document 1. Use 32-bit addressing in dts example property, reg. v2 changes: - Update document 1. Correct error in dts example. 2. Drop description for mbox-cell per suggestion previously. Jammy Huang (2): dt-bindings: mailbox: Add ASPEED AST2700 series SoC mailbox: aspeed: add mailbox driver for AST27XX series SoC .../mailbox/aspeed,ast2700-mailbox.yaml | 60 +++++ drivers/mailbox/Kconfig | 8 + drivers/mailbox/Makefile | 2 + drivers/mailbox/ast2700-mailbox.c | 240 ++++++++++++++++++ 4 files changed, 310 insertions(+) create mode 100644 Documentation/devicetree/bindings/mailbox/aspeed,ast2700-mailbox.yaml create mode 100644 drivers/mailbox/ast2700-mailbox.c base-commit: ec7714e4947909190ffb3041a03311a975350fe0 -- 2.25.1