From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailout2.w1.samsung.com (mailout2.w1.samsung.com [210.118.77.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 96F98267F53 for ; Wed, 25 Jun 2025 14:38:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.118.77.12 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750862310; cv=none; b=TWS3MiNIc7RTUYJj6fCP9I3NwInOWpQUJ3Um/hPO6DwP3X01E6++N61lw8QiivHw/3N9s1WpXRnH4lGRYdrWe49AaCE67OaAUOVtxklAnjf52EU235XfRou2RlPlJcZCIu7fh9ktIv3HSnOkRxv05Zv1FLidExbrU6jqsbXsfEs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750862310; c=relaxed/simple; bh=8XoLBFN4X2J53c6WkchgBiFl2rLtXlJ2Jsji10lKYfg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:MIME-Version: Content-Type:References; b=r+tTwhFUYbpXS+0dXFjStSIBehPXF7SJosLZVic/kzfPwbWKRce17hUzzN/n7OTG3xB3IUYP5A7e8dSe1InFFURpyroRkuw0FieS83zyLv51ubHk8iZhoihNQAmCLnWYuVqz1dPo9uqdXfPk3nNVOeE2kBCPytFRXdYXX77NCWE= ARC-Authentication-Results:i=1; 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charset="utf-8" X-RootMTR: 20250625143825eucas1p2e95ba80552cd289b6e05db33f32ec14a X-EPHeader: CA X-CMS-RootMailID: 20250625143825eucas1p2e95ba80552cd289b6e05db33f32ec14a References: > Can you check with with following changes > > diff --git a/drivers/thermal/samsung/exynos_tmu.c > b/drivers/thermal/samsung/exynos_tmu.c > index 9fc085f4ea1a..0776801fafea 100644 > --- a/drivers/thermal/samsung/exynos_tmu.c > +++ b/drivers/thermal/samsung/exynos_tmu.c > @@ -469,14 +469,11 @@ static void exynos4412_tmu_initialize(struct > platform_device *pdev) > ctrl = readl(data->base + EXYNOS_TMU_TRIMINFO_CON2); > ctrl = EXYNOS_TRIMINFO_RELOAD_ENABLE; > writel(ctrl, data->base + EXYNOS_TMU_TRIMINFO_CON2); > + return; > } > > - /* On exynos5420 the triminfo register is in the shared space */ > - if (data->soc == SOC_ARCH_EXYNOS5420 > - data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO) { > - trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO); > - sanitize_temp_error(data, trim_info); > - } > + trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO); > + sanitize_temp_error(data, trim_info); > } This does seem to work (tested on 3250 and on 5420) in the sense that I can read the temperatures, when they increase the state of the cooling device gets increased, and the values look reasonable and stay in a reasonable range. Hard to say if the trim and the temperature values are correct, though. (FYI I will probably have a harder time regarding the drivers from GitHub you linked in 2/3, so no promises on testing them.) > As per my Exynos5422 user manual and DTS mapping > thermal-sensor tmu@10060000 is mapped to CPU0 with tmu_apbif clock > thermal-sensor tmu@10064000 is mapped to CPU1 with tmu_apbif clock > thermal-sensor tmu@10068000 is mapped to CPU2 with tmu_apbif clock > thermal-sensor tmu@1006c000 is mapped to CPU3 with tmu_apbif clock > thermal-sensor tmu@100a0000 is mapped to GPU with tmu_triminfo_apbif clock. Hmm, I might be missing something, but I think the DTS does link to two adresses and two clocks, for instance for GPU (in arch/arm/boot/dts/samsung/exynos5420.dtsi): tmu_gpu: tmu@100a0000 { compatible = "samsung,exynos5420-tmu-ext-triminfo"; reg = <0x100a0000 0x100>, <0x10068000 0x4>; interrupts = ; clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>; clock-names = "tmu_apbif", "tmu_triminfo_apbif"; #thermal-sensor-cells = <0>; }; The manual does indeed not say anything about this, but I feel like the current code in essence states that the manual is not correct. We probably should have some evidence that the current code is wrong and the manual was correct all along? Thank you, Mateusz Majewski