Re: [PATCH 3/6] spi: Add driver for the RZ/V2H(P) RSPI IP

[kernel test robot <lkp@intel.com>]

Hi Fabrizio,

kernel test robot noticed the following build errors:

[auto build test ERROR on broonie-spi/for-next]
[also build test ERROR on geert-renesas-drivers/renesas-clk arm64/for-next/core geert-renesas-devel/next robh/for-next linus/master v6.16-rc3 next-20250625]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Fabrizio-Castro/clk-renesas-r9a09g057-Add-entries-for-the-RSPIs/20250625-032714
base:   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
patch link:    https://lore.kernel.org/r/20250624192304.338979-4-fabrizio.castro.jz%40renesas.com
patch subject: [PATCH 3/6] spi: Add driver for the RZ/V2H(P) RSPI IP
config: alpha-allyesconfig (https://download.01.org/0day-ci/archive/20250625/202506251915.mDWx8v2S-lkp@intel.com/config)
compiler: alpha-linux-gcc (GCC) 15.1.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250625/202506251915.mDWx8v2S-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202506251915.mDWx8v2S-lkp@intel.com/

All errors (new ones prefixed by >>):

   drivers/spi/spi-rzv2h-rspi.c: In function 'rzv2h_rspi_prepare_message':
>> drivers/spi/spi-rzv2h-rspi.c:298:18: error: implicit declaration of function 'FIELD_PREP' [-Wimplicit-function-declaration]
     298 |         conf32 = FIELD_PREP(RSPI_SPCMD_CPOL, !!(spi->mode & SPI_CPOL));
         |                  ^~~~~~~~~~


vim +/FIELD_PREP +298 drivers/spi/spi-rzv2h-rspi.c

   268	
   269	static int rzv2h_rspi_prepare_message(struct spi_controller *ctlr,
   270					      struct spi_message *message)
   271	{
   272		struct rzv2h_rspi_priv *rspi = spi_controller_get_devdata(ctlr);
   273		const struct spi_device *spi = message->spi;
   274		struct spi_transfer *xfer;
   275		u32 speed_hz = U32_MAX;
   276		u8 bits_per_word;
   277		u32 conf32;
   278		u16 conf16;
   279	
   280		/* Make sure SPCR.SPE is 0 before amending the configuration */
   281		rzv2h_rspi_spe_disable(rspi);
   282	
   283		/* Configure the device to work in "host" mode */
   284		conf32 = RSPI_SPCR_MSTR;
   285	
   286		/* Auto-stop function */
   287		conf32 |= RSPI_SPCR_SCKASE;
   288	
   289		/* SPI receive buffer full interrupt enable */
   290		conf32 |= RSPI_SPCR_SPRIE;
   291	
   292		writel(conf32, rspi->base + RSPI_SPCR);
   293	
   294		/* Use SPCMD0 only */
   295		writeb(0x0, rspi->base + RSPI_SPSCR);
   296	
   297		/* Setup mode */
 > 298		conf32 = FIELD_PREP(RSPI_SPCMD_CPOL, !!(spi->mode & SPI_CPOL));
   299		conf32 |= FIELD_PREP(RSPI_SPCMD_CPHA, !!(spi->mode & SPI_CPHA));
   300		conf32 |= FIELD_PREP(RSPI_SPCMD_LSBF, !!(spi->mode & SPI_LSB_FIRST));
   301		conf32 |= FIELD_PREP(RSPI_SPCMD_SSLKP, 1);
   302		conf32 |= FIELD_PREP(RSPI_SPCMD_SSLA, spi_get_chipselect(spi, 0));
   303		writel(conf32, rspi->base + RSPI_SPCMD);
   304		if (spi->mode & SPI_CS_HIGH)
   305			writeb(BIT(spi_get_chipselect(spi, 0)), rspi->base + RSPI_SSLP);
   306		else
   307			writeb(0, rspi->base + RSPI_SSLP);
   308	
   309		/* Setup FIFO thresholds */
   310		conf16 = FIELD_PREP(RSPI_SPDCR2_TTRG, RSPI_FIFO_SIZE - 1);
   311		conf16 |= FIELD_PREP(RSPI_SPDCR2_RTRG, 0);
   312		writew(conf16, rspi->base + RSPI_SPDCR2);
   313	
   314		rzv2h_rspi_clear_fifos(rspi);
   315	
   316		list_for_each_entry(xfer, &message->transfers, transfer_list) {
   317			if (!xfer->speed_hz)
   318				continue;
   319	
   320			speed_hz = min(xfer->speed_hz, speed_hz);
   321			bits_per_word = xfer->bits_per_word;
   322		}
   323	
   324		if (speed_hz == U32_MAX)
   325			return -EINVAL;
   326	
   327		rspi->bytes_per_word = roundup_pow_of_two(BITS_TO_BYTES(bits_per_word));
   328		rzv2h_rspi_reg_rmw(rspi, RSPI_SPCMD, RSPI_SPCMD_SPB, bits_per_word - 1);
   329	
   330		rspi->freq = rzv2h_rspi_setup_clock(rspi, speed_hz);
   331		if (!rspi->freq)
   332			return -EINVAL;
   333	
   334		rzv2h_rspi_spe_enable(rspi);
   335	
   336		return 0;
   337	}
   338	

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