From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 549E430113A; Wed, 2 Jul 2025 16:34:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751474049; cv=none; b=FBAl2VNfxA8QcZ7UuE67Tlv9nR7ODlp+pEZcObbkJXLG1efgzveK858siqi6GwC401qyEDlL31vizuyKclirTkT1xSdSHArvexu089ed3IWL5J2XMvTaHzNS8bNLQ/83DsCUtzYfMIIBvqoddXVfmkeaEJBauajhNikMRmQP+bc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751474049; c=relaxed/simple; bh=ZJx70kiDsgC+DvPstRSCuB+T5Sr+VGqtX8Iu26ORUf8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Xd3Fz2O0Knr5wVkf7tAtgZV+yZXT7AVtCqzPyoEZ0W/xESNg03qediC/aVhMauUgVuNbHqIpVGYFY9ZsqI9JTYaf6TARz39WMMqgZ91q3ARiLD+0YtygQuWN58PGnyugNFj//j/U4fiTPBWD7AL9WcGFg1g80jV0YGLWFXNFXE4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ICpwtqzl; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ICpwtqzl" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 68ABEC4CEE7; Wed, 2 Jul 2025 16:34:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1751474049; bh=ZJx70kiDsgC+DvPstRSCuB+T5Sr+VGqtX8Iu26ORUf8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=ICpwtqzl0H5YlFQTUe36id493BGzReA0DPBU1bxUBrIDqDXwaAlLo92n44OT6Zler KhfrCeRp3HvRO2RJQwNvYhrYEfnWGT2VCKvpzLY6A4ZtoNY1mSX+jdozTocO3FRPZM FvKLyzF0cNVAMy5lhvuJo72qzRdUFxWnx1THFXezmEjXmUcEFbWSFJxrBGHhElmsAz uihOfk5bRc1/VeoISbrEbnAVaDSZKjP0Jq27//6Vee2juMDbbpJnKA/PdhpQUXvRtV hDUmpi/G7ZoHCwnL67KznpKYmVkclKw78f7U5HmE5UlecNWCC5M2ZL2ezop0D+DPJ/ AQFZlcaSSonYQ== From: Daniel Wagner Date: Wed, 02 Jul 2025 18:33:52 +0200 Subject: [PATCH v7 02/10] genirq/affinity: Add cpumask to struct irq_affinity Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20250702-isolcpus-io-queues-v7-2-557aa7eacce4@kernel.org> References: <20250702-isolcpus-io-queues-v7-0-557aa7eacce4@kernel.org> In-Reply-To: <20250702-isolcpus-io-queues-v7-0-557aa7eacce4@kernel.org> To: Jens Axboe , Keith Busch , Christoph Hellwig , Sagi Grimberg , "Michael S. Tsirkin" Cc: Aaron Tomlin , "Martin K. Petersen" , Thomas Gleixner , Costa Shulyupin , Juri Lelli , Valentin Schneider , Waiman Long , Ming Lei , Frederic Weisbecker , Mel Gorman , Hannes Reinecke , Mathieu Desnoyers , linux-kernel@vger.kernel.org, linux-block@vger.kernel.org, linux-nvme@lists.infradead.org, megaraidlinux.pdl@broadcom.com, linux-scsi@vger.kernel.org, storagedev@microchip.com, virtualization@lists.linux.dev, GR-QLogic-Storage-Upstream@marvell.com, Daniel Wagner X-Mailer: b4 0.14.2 Pass a cpumask to irq_create_affinity_masks as an additional constraint to consider when creating the affinity masks. This allows the caller to exclude specific CPUs, e.g., isolated CPUs (see the 'isolcpus' kernel command-line parameter). Signed-off-by: Daniel Wagner --- include/linux/interrupt.h | 16 ++++++++++------ kernel/irq/affinity.c | 12 ++++++++++-- 2 files changed, 20 insertions(+), 8 deletions(-) diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h index 51b6484c049345c75816c4a63b4efa813f42f27b..b1a230953514da57e30e601727cd0e94796153d3 100644 --- a/include/linux/interrupt.h +++ b/include/linux/interrupt.h @@ -284,18 +284,22 @@ struct irq_affinity_notify { * @nr_sets: The number of interrupt sets for which affinity * spreading is required * @set_size: Array holding the size of each interrupt set + * @mask: cpumask that constrains which CPUs to consider when + * calculating the number and size of the interrupt sets * @calc_sets: Callback for calculating the number and size * of interrupt sets * @priv: Private data for usage by @calc_sets, usually a * pointer to driver/device specific data. */ struct irq_affinity { - unsigned int pre_vectors; - unsigned int post_vectors; - unsigned int nr_sets; - unsigned int set_size[IRQ_AFFINITY_MAX_SETS]; - void (*calc_sets)(struct irq_affinity *, unsigned int nvecs); - void *priv; + unsigned int pre_vectors; + unsigned int post_vectors; + unsigned int nr_sets; + unsigned int set_size[IRQ_AFFINITY_MAX_SETS]; + const struct cpumask *mask; + void (*calc_sets)(struct irq_affinity *, + unsigned int nvecs); + void *priv; }; /** diff --git a/kernel/irq/affinity.c b/kernel/irq/affinity.c index 4013e6ad2b2f1cb91de12bb428b3281105f7d23b..c68156f7847a7920103e39124676d06191304ef6 100644 --- a/kernel/irq/affinity.c +++ b/kernel/irq/affinity.c @@ -70,7 +70,13 @@ irq_create_affinity_masks(unsigned int nvecs, struct irq_affinity *affd) */ for (i = 0, usedvecs = 0; i < affd->nr_sets; i++) { unsigned int nr_masks, this_vecs = affd->set_size[i]; - struct cpumask *result = group_cpus_evenly(this_vecs, &nr_masks); + struct cpumask *result; + + if (affd->mask) + result = group_mask_cpus_evenly(this_vecs, affd->mask, + &nr_masks); + else + result = group_cpus_evenly(this_vecs, &nr_masks); if (!result) { kfree(masks); @@ -115,7 +121,9 @@ unsigned int irq_calc_affinity_vectors(unsigned int minvec, unsigned int maxvec, if (resv > minvec) return 0; - if (affd->calc_sets) { + if (affd->mask) { + set_vecs = cpumask_weight(affd->mask); + } else if (affd->calc_sets) { set_vecs = maxvec - resv; } else { cpus_read_lock(); -- 2.50.0