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Date: Wed, 2 Jul 2025 15:40:28 +0100
From: Leo Yan <leo.yan@arm.com>
To: Yeoreum Yun <yeoreum.yun@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
	Mike Leach <mike.leach@linaro.org>,
	James Clark <james.clark@linaro.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
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	coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 06/28] coresight: etm4x: Add context synchronization
 before enabling trace
Message-ID: <20250702144028.GY794930@e132581.arm.com>
References: <20250701-arm_cs_pm_fix_v3-v2-0-23ebb864fcc1@arm.com>
 <20250701-arm_cs_pm_fix_v3-v2-6-23ebb864fcc1@arm.com>
 <aGUSZpR1QHNgLu6f@e129823.arm.com>
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In-Reply-To: <aGUSZpR1QHNgLu6f@e129823.arm.com>

On Wed, Jul 02, 2025 at 12:05:10PM +0100, Yeoreum Yun wrote:

[...]

> > @@ -445,13 +445,37 @@ static int etm4_enable_trace_unit(struct etmv4_drvdata *drvdata)
> >  		etm4x_relaxed_write32(csa, TRCRSR_TA, TRCRSR);
> >
> >  	etm4x_allow_trace(drvdata);
> > +
> > +	/*
> > +	 * According to software usage PKLXF in Arm ARM (ARM DDI 0487 L.a),
> > +	 * execute a Context synchronization event to guarantee the trace unit
> > +	 * will observe the new values of the System registers.
> > +	 */
> > +	if (!csa->io_mem)
> > +		isb();
> > +
> 
> But, when write to SYS_TRFCR_EL1 in etm4x_allow_trace(), it already does
> isb(). Is it redundant?

Good point. It is not sufficient. As a system register writing in
kvm_tracing_set_el1_configuration(), this is why adds a ISB here.

Thanks,
Leo