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[130.180.211.218]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-454b16990aasm57709375e9.32.2025.07.05.09.01.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Jul 2025 09:01:46 -0700 (PDT) From: Daniel Lezcano To: daniel.lezcano@linaro.org, tglx@linutronix.de Cc: ghennadi.procopciuc@oss.nxp.com, S32@nxp.com, linux-kernel@vger.kernel.org Subject: [PATCH 11/20] clocksource/drivers/vf-pit: Encapsulate the PTLCVAL macro Date: Sat, 5 Jul 2025 18:01:17 +0200 Message-ID: <20250705160129.3688026-11-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250705160129.3688026-1-daniel.lezcano@linaro.org> References: <20250705160129.3688026-1-daniel.lezcano@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Pass the channel and the base address to the PITLCVAL macro so it is possible to use multiple instances of the timer with the macro. Signed-off-by: Daniel Lezcano --- drivers/clocksource/timer-vf-pit.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/clocksource/timer-vf-pit.c b/drivers/clocksource/timer-vf-pit.c index 9c5e06506c26..bd90c607c45e 100644 --- a/drivers/clocksource/timer-vf-pit.c +++ b/drivers/clocksource/timer-vf-pit.c @@ -17,13 +17,13 @@ #define PIT0_OFFSET 0x100 #define PIT_CH(n) (PIT0_OFFSET + 0x10 * (n)) -#define PITCVAL 0x04 - #define PITMCR_MDIS BIT(1) #define PITLDVAL(__base) (__base) #define PITTCTRL(__base) ((__base) + 0x08) +#define PITCVAL_OFFSET 0x04 +#define PITCVAL(__base) ((__base) + 0x04) #define PITTCTRL_TEN BIT(0) #define PITTCTRL_TIE BIT(1) @@ -40,7 +40,7 @@ struct pit_timer { struct clocksource cs; }; -static void __iomem *clksrc_base; +static void __iomem *sched_clock_base; static inline struct pit_timer *ced_to_pit(struct clock_event_device *ced) { @@ -69,14 +69,14 @@ static inline void pit_irq_acknowledge(struct pit_timer *pit) static u64 notrace pit_read_sched_clock(void) { - return ~readl(clksrc_base + PITCVAL); + return ~readl(sched_clock_base); } static u64 pit_timer_clocksource_read(struct clocksource *cs) { struct pit_timer *pit = cs_to_pit(cs); - return ~(u64)readl(pit->clksrc_base + PITCVAL); + return ~(u64)readl(PITCVAL(pit->clksrc_base)); } static int __init pit_clocksource_init(struct pit_timer *pit, void __iomem *base, @@ -99,8 +99,7 @@ static int __init pit_clocksource_init(struct pit_timer *pit, void __iomem *base writel(~0, PITLDVAL(pit->clksrc_base)); writel(PITTCTRL_TEN, PITTCTRL(pit->clksrc_base)); - clksrc_base = pit->clksrc_base; - + sched_clock_base = pit->clksrc_base + PITCVAL_OFFSET; sched_clock_register(pit_read_sched_clock, 32, rate); return clocksource_register_hz(&pit->cs, rate); -- 2.43.0