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[130.180.211.218]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-454b16990aasm57709375e9.32.2025.07.05.09.01.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Jul 2025 09:01:48 -0700 (PDT) From: Daniel Lezcano To: daniel.lezcano@linaro.org, tglx@linutronix.de Cc: ghennadi.procopciuc@oss.nxp.com, S32@nxp.com, linux-kernel@vger.kernel.org Subject: [PATCH 13/20] clocksource/drivers/vf-pit: Encapsulate clocksource enable / disable Date: Sat, 5 Jul 2025 18:01:19 +0200 Message-ID: <20250705160129.3688026-13-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250705160129.3688026-1-daniel.lezcano@linaro.org> References: <20250705160129.3688026-1-daniel.lezcano@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit For the sake of lisibility, let's encapsulate the writel calls to enable and disable the timer into a function with a self-explainatory name. Signed-off-by: Daniel Lezcano --- drivers/clocksource/timer-vf-pit.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/clocksource/timer-vf-pit.c b/drivers/clocksource/timer-vf-pit.c index 71a17b6aab06..2799cff2a296 100644 --- a/drivers/clocksource/timer-vf-pit.c +++ b/drivers/clocksource/timer-vf-pit.c @@ -62,6 +62,16 @@ static inline void pit_timer_disable(struct pit_timer *pit) writel(0, PITTCTRL(pit->clkevt_base)); } +static inline void pit_clocksource_enable(struct pit_timer *pit) +{ + writel(PITTCTRL_TEN, PITTCTRL(pit->clksrc_base)); +} + +static inline void pit_clocksource_disable(struct pit_timer *pit) +{ + pit_timer_disable(pit); +} + static inline void pit_irq_acknowledge(struct pit_timer *pit) { writel(PITTFLG_TIF, PITTFLG(pit->clkevt_base)); @@ -95,9 +105,9 @@ static int __init pit_clocksource_init(struct pit_timer *pit, const char *name, pit->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS; /* set the max load value and start the clock source counter */ - pit_timer_disable(pit); + pit_clocksource_disable(pit); writel(~0, PITLDVAL(pit->clksrc_base)); - writel(PITTCTRL_TEN, PITTCTRL(pit->clksrc_base)); + pit_clocksource_enable(pit); sched_clock_base = pit->clksrc_base + PITCVAL_OFFSET; sched_clock_register(pit_read_sched_clock, 32, rate); -- 2.43.0