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De Francesco" , Terry Bowman , Robert Richter Subject: [PATCH v1 00/20] cxl: Address translation support, part 2: Region code rework Date: Tue, 15 Jul 2025 21:11:23 +0200 Message-ID: <20250715191143.1023512-1-rrichter@amd.com> X-Mailer: git-send-email 2.39.5 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000F0E5:EE_|CY8PR12MB8411:EE_ X-MS-Office365-Filtering-Correlation-Id: 2da62d70-b4b9-40a0-9dca-08ddc3d380f9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700013|7416014|376014|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?u9sWnwEQmCVBNJLYCuU0N/VUipksew5eY+atv9AKZJ40twn9bSP6AaVCIVgc?= =?us-ascii?Q?YZ9Rm9qQyf5p8yDo97uCaC9WISQatkwPmrD6Pr3FPWQAIvHjuVsg6rj8jXMl?= =?us-ascii?Q?lo4TWes33pPJmsgasBSLDOa5m3v1cjQCtR8XVP+DeTW+lY5ux56PqLUwWNYo?= =?us-ascii?Q?zmjzCi4lJ8JV3o1ml8xgUAbQ3Qcz07pKocmTaFHfJbiuIByO/Oc0Z/KeFW0p?= =?us-ascii?Q?KAUyQ3Gjfm5DE85IKr8gci3DnVTDUvT7rvgGYVrL44I3dztnQ/ealG3maxF7?= =?us-ascii?Q?t8a8emZnS+71EQvUAVTg3SX1T0uJ4x/7upDDuzO+qt3hRDdG743pyqwnv60g?= =?us-ascii?Q?b8G9aKbfj2kRYqByTZIpxQZI2FSPs01400NX5D8XCM1lUaIShv8ojCnUiZq+?= =?us-ascii?Q?UTTbOCtvqGHJWd+Jb3dDroEKWS858OsDQI8YuaWXzzcshJIdxBGUe/8yYCu1?= =?us-ascii?Q?aE97wRI2vO9f/rwqupk7S25Djc+v2WZHSLdCcqinHIcZSpvrppkJ9veDVL+q?= =?us-ascii?Q?i3idMjC0p+4FUncxzHcLsnTyVMXaCn96zvILU2XYQ70D0UTvs8XvcRIs5Yhr?= =?us-ascii?Q?OirPP037UjLkuU2JOdiFSJHZrY4QBPCxuneO4UMP26Xsek3mCaHLBgRfQVO2?= =?us-ascii?Q?fvyEJGgDhB+4qZ4LX7gC1qzYtNAThNeVAACQcAKxMr8k6gnGES9aQakk9FoP?= =?us-ascii?Q?nMt0exxiBkdIyyPxUb2G95MrbYMJp4jt/GgxT5X812NyZJpFsTPB5BhTYF+n?= =?us-ascii?Q?AqP2LYgGfjayPVrTigz9CSYZPl2b+Ei/VP2qUEM40ujDNDWDC1cIvzMyb3tF?= =?us-ascii?Q?/06Z0XSjLP5933Isfa7n7QBEoGhrHERZqYk8+GLSDjkU2fdaUWHtfSx+C0NI?= =?us-ascii?Q?ky/DvRpCxoydzNo6IEEWVJSeIbHRgkS3MFOifTCONUnMl18MYmpOPPlLXjiV?= =?us-ascii?Q?qEzbp4gBLJJE+k+4nliPG3aIFN9S3mB81UCCu8RUMZIqQrKj37pdlbirgq06?= =?us-ascii?Q?Ifp9oyODAOu3sawXvjqk37s/zAqSayhSvtx1e1tO0u5DXhoxfcyGehUGbADK?= =?us-ascii?Q?R/CSyMBbowSXdr1b3h0PezU5aZ8j9WnXRT8Q3vnXkm0cYfFa/Cghhw9XOXdB?= =?us-ascii?Q?gvbrisiHYwBdzy2FqEnOe0wxrlVkkrvGJ8kchnqe5oAHp9I9jSgsufIDSqR3?= =?us-ascii?Q?zTNF6ulgOjkqfyrbjMlLLkUwl2HX+jsmdBxpm0xJtiVlY2MKaiRMYHs85ojr?= =?us-ascii?Q?lz4dQgmXc7AMM8RmGcfDfZ+4Qw2QbOOOcW9Vt3YtzoaT3dh8pOUDA1bNMViU?= =?us-ascii?Q?M4hkV2MuTX1hrmaN3ioWCNvRPxiqzFP6ZjUbyoNk2XCGBsWURN0r/ER/S8iw?= =?us-ascii?Q?uH1nKk/sFV2XJ/A/Hk28QiLuNuM0SOhUIX4ljhzUtQkNMEm0S3PFaBNkapbH?= =?us-ascii?Q?NOBcl3SWdSCa3H8zyyxnyVmxB9vTKHEanjrJUskwKLFVEtDqmnN49xRL4s3J?= =?us-ascii?Q?L95BrHuBobo6IGw8rk9lB8b4vefIYdTF5ODG?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(36860700013)(7416014)(376014)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Jul 2025 19:12:12.5411 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2da62d70-b4b9-40a0-9dca-08ddc3d380f9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E5.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB8411 This series is the second part of adding support for CXL address translation. It adds another rework of region code to address implementation changes or conflicts of current address translation code with cxl/next, esp. the introduction of support of extended linear caching. Following parts are currently planned, worked on or finished: Part 1: Cleanups and refactoring Upstream: 68d8b4f399e7 ("Merge branch 'for-6.16/cxl-cleanups' into cxl-for-next") Part 2: Region code rework This initial patch series. Part 3: Extended linear cache rework Not yet posted. Part 4: Generic support and AMD Zen5 platform enablement. Not yet posted. (Earlier version posted as part 2, v2: Generic support and AMD Zen5 platform enablement. [1]) The general changes in the implementation compared to [1] are in particular to use the attached region of an endpoint decoder to host the HPA range and interleaving configuration parameters. That is, the region's root decoder and HPA range are added as members @cxlrd and @hpa_range to struct cxl_region. Both are introduced to keep track of the region's SPA address range and the interleaving configuration. Those parameters are the same for all endpoint decoders that share the same interleaving setup. The implementation must ensure that the endpoint decoder's region parameters are always valid. All parameters must be determined first and then a check must be performed if a region with identical parameters already exists. A split of region creation and registration is required as the region may not become active and may need to be replaced by an already existing region. Several high-level functions are introduced (create_region(), setup_region(), register_region(), cxl_endpoint_get_region(), cxl_region_find_duplicate()). Most of it is implemented in cxl_add_to_region(). Finally, this series adds a lot of simplification and improves error handling and code readability. [1] https://lore.kernel.org/all/20250218132356.1809075-1-rrichter@amd.com/ Robert Richter (20): cxl/region: Move helper functions closer to their users cxl/region: Store root decoder in struct cxl_region cxl/region: Remove region id handling from cxl_region_alloc() cxl/region: Add region registration code to new function register_region() cxl/region: Separate cxl_region_alloc() from devm_cxl_add_region() cxl/region: Remove dev_err() from cxl_find_root_decoder() cxl/region: Add new function cxl_endpoint_get_region() to simplify cxl_add_to_region() cxl/region: Rework memregion id allocation and move it to register_region() cxl/region: Change __construct_region() to use it as a tail function call cxl/region: Remove __construct_region() cxl/region: Separate auto-generated region cration code path cxl/region: Remove region creation code from construct_region() cxl/region: Move devm_cxl_add_region() out of create_region() cxl/region: Prepare removal of @cxlrd argument from create_region() cxl/region: Prepare removal of @cxled argument from construct_region() cxl/region: Introduce @hpa_range to struct cxl_region cxl/region: Remove create_region() call from construct_region() cxl/region: Determine root decoder in create_region() cxl/region: Add function to find a region's duplicate cxl/region: Early check region's interleaving configuration drivers/cxl/core/region.c | 514 +++++++++++++++++++++++--------------- drivers/cxl/cxl.h | 4 + 2 files changed, 315 insertions(+), 203 deletions(-) base-commit: 12b3d697c812aaf356e82d9e1f351fbb2ea97500 -- 2.39.5