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Wed, 16 Jul 2025 02:09:04 -0700 (PDT) From: Khalid Ali X-Google-Original-From: Khalid Ali X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250716014504.GAaHcEIIUgNOdu_n2s@fat_crate.local> References: <20250716014504.GAaHcEIIUgNOdu_n2s@fat_crate.local> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit > > > diff > > > > > > --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index > > > 4390a28f7dad..dfb5390e5c9a 100644 --- a/arch/x86/kernel/head_64.S +++ > > > b/arch/x86/kernel/head_64.S @@ -222,12 +222,9 @@ > > > SYM_INNER_LABEL(common_startup_64, SYM_L_LOCAL) > > > /* Even if ignored in long mode, set PSE uniformly on all logical CPUs. */ > > > btsl $X86_CR4_PSE_BIT, %ecx > > > - movq %rcx, %cr4 - - /* - * Set CR4.PGE to re-enable global > > > translations. - */ + /* Set CR4.PGE to re-enable global translations. */ btsl $X86_CR4_PGE_BIT, %ecx > > > + movq %rcx, %cr4 > > > > The comments are at best misleading, but you've broken the TLB flush > > being performed which depends on the double write. > > > > This logic is intentionally performing a write with CR4.PGE=0 followed > > by one with CR4.PGE=1 to flush all global mappings. > Thanks both of you for the catch - I didn't realize that fact. Zapped now. > > So yeah, maybe there should be a comment explaining this subtlety. > > Thx. I think the comment is misplaced. It is better if we move starting from "from the SDM" to below the endif. The second move the comment above it isn't useful also everyone knows what PGE bit does, so it is better if we replace with the above misplaced comment. Thanks Khalid Ali