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From: Brian Geffon <bgeffon@google.com>
To: Alex Deucher <alexander.deucher@amd.com>, christian.koenig@amd.com
Cc: David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
	 Tvrtko Ursulin <tvrtko.ursulin@igalia.com>,
	Yunxiang Li <Yunxiang.Li@amd.com>,
	 Lijo Lazar <lijo.lazar@amd.com>,
	Prike Liang <Prike.Liang@amd.com>,
	 Pratap Nirujogi <pratap.nirujogi@amd.com>,
	Luben Tuikov <luben.tuikov@amd.com>,
	 amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
	 linux-kernel@vger.kernel.org, Garrick Evans <garrick@google.com>,
	 Thadeu Lima de Souza Cascardo <cascardo@igalia.com>,
	Brian Geffon <bgeffon@google.com>,
	stable@vger.kernel.org
Subject: [PATCH] drm/amdgpu: Raven: don't allow mixing GTT and VRAM
Date: Wed, 16 Jul 2025 16:17:53 +0000	[thread overview]
Message-ID: <20250716161753.231145-1-bgeffon@google.com> (raw)

Commit 81d0bcf99009 ("drm/amdgpu: make display pinning more flexible (v2)")
allowed for newer ASICs to mix GTT and VRAM, this change also noted that
some older boards, such as Stoney and Carrizo do not support this.
It appears that at least one additional ASIC does not support this which
is Raven.

We observed this issue when migrating a device from a 5.4 to 6.6 kernel
and have confirmed that Raven also needs to be excluded from mixing GTT
and VRAM.

Fixes: 81d0bcf99009 ("drm/amdgpu: make display pinning more flexible (v2)")
Cc: Luben Tuikov <luben.tuikov@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 6.1+
Tested-by: Thadeu Lima de Souza Cascardo <cascardo@igalia.com>
Signed-off-by: Brian Geffon <bgeffon@google.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 73403744331a..5d7f13e25b7c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -1545,7 +1545,8 @@ uint32_t amdgpu_bo_get_preferred_domain(struct amdgpu_device *adev,
 					    uint32_t domain)
 {
 	if ((domain == (AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT)) &&
-	    ((adev->asic_type == CHIP_CARRIZO) || (adev->asic_type == CHIP_STONEY))) {
+	    ((adev->asic_type == CHIP_CARRIZO) || (adev->asic_type == CHIP_STONEY) ||
+	     (adev->asic_type == CHIP_RAVEN))) {
 		domain = AMDGPU_GEM_DOMAIN_VRAM;
 		if (adev->gmc.real_vram_size <= AMDGPU_SG_THRESHOLD)
 			domain = AMDGPU_GEM_DOMAIN_GTT;
-- 
2.50.0.727.gbf7dc18ff4-goog


             reply	other threads:[~2025-07-16 16:18 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-16 16:17 Brian Geffon [this message]
2025-07-16 16:33 ` Alex Deucher
2025-07-16 16:40   ` Brian Geffon
2025-07-16 21:02     ` Alex Deucher
2025-07-17  0:12       ` Brian Geffon
2025-07-17  7:58         ` Christian König
2025-07-17 14:58         ` Alex Deucher
2025-07-17 15:34           ` Michel Dänzer
2025-07-18 17:56           ` Brian Geffon
2025-07-18 20:07             ` Alex Deucher
2025-07-18 21:02               ` Leo Li
2025-07-18 21:33                 ` Alex Deucher
2025-07-18 22:01                   ` Leo Li
2025-07-18 23:00                     ` Alex Deucher
2025-07-22 11:21                       ` Thadeu Lima de Souza Cascardo
2025-07-22 13:54                         ` Leo Li
2025-07-28 16:38                           ` Alex Deucher
2025-08-05 10:16                             ` Christian König

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