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client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SA2PEPF00003AEB.mail.protection.outlook.com (10.167.248.11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8943.21 via Frontend Transport; Thu, 17 Jul 2025 16:56:29 +0000 Received: from titanite-d354host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Thu, 17 Jul 2025 11:56:28 -0500 From: Avadhut Naik To: CC: , , , , Subject: [PATCH 0/2] Incorporate DRAM address in EDAC messages Date: Thu, 17 Jul 2025 16:48:41 +0000 Message-ID: <20250717165622.1162091-1-avadhut.naik@amd.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00003AEB:EE_|SJ1PR12MB6172:EE_ X-MS-Office365-Filtering-Correlation-Id: ae1004b1-946a-4dc7-3fb0-08ddc552e076 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|82310400026|1800799024; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jul 2025 16:56:29.9652 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ae1004b1-946a-4dc7-3fb0-08ddc552e076 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003AEB.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6172 Currently, the amd64_edac module only provides UMC normalized and system physical address when a DRAM ECC error occurs. DRAM Address is neither logged nor exported through tracepoint. Modern AMD SOCs provide UEFI PRM module that implements various address translation PRM handlers. These PRM handlers can be leveraged to convert UMC normalized address into DRAM address at runtime on occurence of a DRAM ECC error. This translated DRAM address can then be logged and exported through tracepoints. This set adds the required support to accomplish the aforementioned. The first patch adds support in the Address Transaltion Library to invoke the appropriate PRM handler to perform the translation. The second patch leverages the support added in the first patch to log DRAM Address and export it through the RAS tracepoint on occurrence of a DRAM ECC error. Avadhut Naik (2): RAS/AMD/ATL: Translate UMC normalized address to DRAM address using PRM EDAC/amd64: Incorporate DRAM Address in EDAC message drivers/edac/amd64_edac.c | 23 ++++++++++++++++++++++ drivers/edac/amd64_edac.h | 1 + drivers/ras/amd/atl/core.c | 3 ++- drivers/ras/amd/atl/internal.h | 9 +++++++++ drivers/ras/amd/atl/prm.c | 36 ++++++++++++++++++++++++++++++---- drivers/ras/amd/atl/umc.c | 12 ++++++++++++ drivers/ras/ras.c | 18 +++++++++++++++-- include/linux/ras.h | 19 +++++++++++++++++- 8 files changed, 113 insertions(+), 8 deletions(-) base-commit: 1fb0ddddf5d139089675b86702933cbca992b4d4 -- 2.43.0