From: Chia-I Wu <olvaffe@gmail.com>
To: Boris Brezillon <boris.brezillon@collabora.com>,
Steven Price <steven.price@arm.com>,
Liviu Dudau <liviu.dudau@arm.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org
Subject: [PATCH 2/9] drm/panthor: capture GPU state for devcoredump
Date: Sat, 19 Jul 2025 17:01:39 -0700 [thread overview]
Message-ID: <20250720000146.1405060-3-olvaffe@gmail.com> (raw)
In-Reply-To: <20250720000146.1405060-1-olvaffe@gmail.com>
Capture interesting GPU_CONTROL regs for devcoredump.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
---
drivers/gpu/drm/panthor/panthor_coredump.c | 85 ++++++++++++++++++++++
drivers/gpu/drm/panthor/panthor_coredump.h | 16 ++++
drivers/gpu/drm/panthor/panthor_regs.h | 6 ++
drivers/gpu/drm/panthor/panthor_sched.c | 6 ++
4 files changed, 113 insertions(+)
diff --git a/drivers/gpu/drm/panthor/panthor_coredump.c b/drivers/gpu/drm/panthor/panthor_coredump.c
index 767f3327e3e8..a41d0bbcb4f1 100644
--- a/drivers/gpu/drm/panthor/panthor_coredump.c
+++ b/drivers/gpu/drm/panthor/panthor_coredump.c
@@ -7,11 +7,13 @@
#include <generated/utsrelease.h>
#include <linux/devcoredump.h>
#include <linux/err.h>
+#include <linux/pm_runtime.h>
#include <linux/slab.h>
#include <linux/timekeeping.h>
#include "panthor_coredump.h"
#include "panthor_device.h"
+#include "panthor_regs.h"
#include "panthor_sched.h"
/**
@@ -19,6 +21,7 @@
*/
enum panthor_coredump_mask {
PANTHOR_COREDUMP_GROUP = BIT(0),
+ PANTHOR_COREDUMP_GPU = BIT(1),
};
/**
@@ -46,6 +49,7 @@ struct panthor_coredump {
u32 mask;
struct panthor_coredump_group_state group;
+ struct panthor_coredump_gpu_state gpu;
/* @data: Serialized coredump data. */
void *data;
@@ -78,6 +82,63 @@ static const char *reason_str(enum panthor_coredump_reason reason)
}
}
+static void print_gpu(struct drm_printer *p,
+ const struct panthor_coredump_gpu_state *gpu,
+ const struct drm_panthor_gpu_info *info)
+{
+ drm_puts(p, "gpu:\n");
+ drm_printf(p, " GPU_ID: 0x%x\n", info->gpu_id);
+ drm_printf(p, " L2_FEATURES: 0x%x\n", info->l2_features);
+ drm_printf(p, " CORE_FEATURES: 0x%x\n", info->core_features);
+ drm_printf(p, " TILER_FEATURES: 0x%x\n", info->tiler_features);
+ drm_printf(p, " MEM_FEATURES: 0x%x\n", info->mem_features);
+ drm_printf(p, " MMU_FEATURES: 0x%x\n", info->mmu_features);
+ drm_printf(p, " AS_PRESENT: 0x%x\n", info->as_present);
+ drm_printf(p, " CSF_ID: 0x%x\n", info->csf_id);
+ drm_printf(p, " MMU_FEATURES: 0x%x\n", info->mmu_features);
+
+ if (gpu) {
+ drm_printf(p, " GPU_STATUS: 0x%x\n", gpu->gpu_status);
+ drm_printf(p, " GPU_FAULTSTATUS: 0x%x\n",
+ gpu->gpu_faultstatus);
+ drm_printf(p, " GPU_FAULTADDRESS: 0x%llx\n",
+ gpu->gpu_faultaddress);
+ drm_printf(p, " L2_CONFIG: 0x%x\n", gpu->l2_config);
+ }
+
+ drm_printf(p, " THREAD_MAX_THREADS: 0x%x\n", info->max_threads);
+ drm_printf(p, " THREAD_MAX_WORKGROUP_SIZE: 0x%x\n",
+ info->thread_max_workgroup_size);
+ drm_printf(p, " THREAD_MAX_BARRIER_SIZE: 0x%x\n",
+ info->thread_max_barrier_size);
+ drm_printf(p, " THREAD_FEATURES: 0x%x\n", info->thread_features);
+ drm_printf(p, " TEXTURE_FEATURES_0: 0x%x\n",
+ info->texture_features[0]);
+ drm_printf(p, " TEXTURE_FEATURES_1: 0x%x\n",
+ info->texture_features[1]);
+ drm_printf(p, " TEXTURE_FEATURES_2: 0x%x\n",
+ info->texture_features[2]);
+ drm_printf(p, " TEXTURE_FEATURES_3: 0x%x\n",
+ info->texture_features[3]);
+
+ if (gpu) {
+ drm_printf(p, " DOORBELL_FEATURES: 0x%x\n",
+ gpu->doorbell_features);
+ }
+
+ drm_printf(p, " SHADER_PRESENT: 0x%llx\n", info->shader_present);
+ drm_printf(p, " TILER_PRESENT: 0x%llx\n", info->tiler_present);
+ drm_printf(p, " L2_PRESENT: 0x%llx\n", info->l2_present);
+ drm_printf(p, " REVIDR: 0x%x\n", info->gpu_rev);
+ drm_printf(p, " AMBA_FEATURES: 0x%x\n", info->coherency_features);
+
+ if (gpu) {
+ drm_printf(p, " AMBA_ENABLE: 0x%x\n", gpu->amba_enable);
+ drm_printf(p, " MCU_STATUS: 0x%x\n", gpu->mcu_status);
+ drm_printf(p, " MCU_FEATURES: 0x%x\n", gpu->mcu_features);
+ }
+}
+
static void print_group(struct drm_printer *p,
const struct panthor_coredump_group_state *group)
{
@@ -111,6 +172,10 @@ static void print_cd(struct drm_printer *p, const struct panthor_coredump *cd)
if (cd->mask & PANTHOR_COREDUMP_GROUP)
print_group(p, &cd->group);
+
+ /* many gpu states are static and are captured in drm_panthor_gpu_info */
+ print_gpu(p, cd->mask & PANTHOR_COREDUMP_GPU ? &cd->gpu : NULL,
+ &cd->ptdev->gpu_info);
}
static void process_cd(struct panthor_device *ptdev,
@@ -137,6 +202,19 @@ static void process_cd(struct panthor_device *ptdev,
print_cd(&p, cd);
}
+static void capture_gpu(struct panthor_device *ptdev,
+ struct panthor_coredump_gpu_state *gpu)
+{
+ gpu->gpu_status = gpu_read(ptdev, GPU_STATUS);
+ gpu->gpu_faultstatus = gpu_read(ptdev, GPU_FAULT_STATUS);
+ gpu->gpu_faultaddress = gpu_read64(ptdev, GPU_FAULT_ADDR);
+ gpu->l2_config = gpu_read(ptdev, GPU_L2_CONFIG);
+ gpu->doorbell_features = gpu_read(ptdev, GPU_DOORBELL_FEATURES);
+ gpu->amba_enable = gpu_read(ptdev, GPU_COHERENCY_PROTOCOL);
+ gpu->mcu_status = gpu_read(ptdev, MCU_STATUS);
+ gpu->mcu_features = gpu_read(ptdev, MCU_FEATURES);
+}
+
static void capture_cd(struct panthor_device *ptdev,
struct panthor_coredump *cd, struct panthor_group *group)
{
@@ -146,6 +224,13 @@ static void capture_cd(struct panthor_device *ptdev,
panthor_group_capture_coredump(group, &cd->group);
cd->mask |= PANTHOR_COREDUMP_GROUP;
}
+
+ /* remaining states require the device to be powered on */
+ if (!pm_runtime_active(ptdev->base.dev))
+ return;
+
+ capture_gpu(ptdev, &cd->gpu);
+ cd->mask |= PANTHOR_COREDUMP_GPU;
}
static void panthor_coredump_free(void *data)
diff --git a/drivers/gpu/drm/panthor/panthor_coredump.h b/drivers/gpu/drm/panthor/panthor_coredump.h
index dd1fe1c2e175..9e30c02ab962 100644
--- a/drivers/gpu/drm/panthor/panthor_coredump.h
+++ b/drivers/gpu/drm/panthor/panthor_coredump.h
@@ -40,6 +40,22 @@ struct panthor_coredump_group_state {
int csg_id;
};
+/**
+ * struct panthor_coredump_gpu_state - Coredump GPU state
+ *
+ * Interesting GPU_CONTROL regs.
+ */
+struct panthor_coredump_gpu_state {
+ u32 gpu_status;
+ u32 gpu_faultstatus;
+ u64 gpu_faultaddress;
+ u32 l2_config;
+ u32 doorbell_features;
+ u32 amba_enable;
+ u32 mcu_status;
+ u32 mcu_features;
+};
+
#ifdef CONFIG_DEV_COREDUMP
struct panthor_coredump *
diff --git a/drivers/gpu/drm/panthor/panthor_regs.h b/drivers/gpu/drm/panthor/panthor_regs.h
index 48bbfd40138c..062f939e075c 100644
--- a/drivers/gpu/drm/panthor/panthor_regs.h
+++ b/drivers/gpu/drm/panthor/panthor_regs.h
@@ -65,6 +65,8 @@
#define GPU_FAULT_STATUS 0x3C
#define GPU_FAULT_ADDR 0x40
+#define GPU_L2_CONFIG 0x48
+
#define GPU_PWR_KEY 0x50
#define GPU_PWR_KEY_UNLOCK 0x2968A819
#define GPU_PWR_OVERRIDE0 0x54
@@ -81,6 +83,8 @@
#define GPU_TEXTURE_FEATURES(n) (0xB0 + ((n) * 4))
+#define GPU_DOORBELL_FEATURES 0xC0
+
#define GPU_SHADER_PRESENT 0x100
#define GPU_TILER_PRESENT 0x110
#define GPU_L2_PRESENT 0x120
@@ -126,6 +130,8 @@
#define MCU_STATUS_HALT 2
#define MCU_STATUS_FATAL 3
+#define MCU_FEATURES 0x708
+
/* Job Control regs */
#define JOB_INT_RAWSTAT 0x1000
#define JOB_INT_CLEAR 0x1004
diff --git a/drivers/gpu/drm/panthor/panthor_sched.c b/drivers/gpu/drm/panthor/panthor_sched.c
index eb45b5ad9774..a9fd71fa984b 100644
--- a/drivers/gpu/drm/panthor/panthor_sched.c
+++ b/drivers/gpu/drm/panthor/panthor_sched.c
@@ -3670,6 +3670,7 @@ static void panthor_sched_coredump_locked(struct panthor_device *ptdev,
struct panthor_group *group)
{
struct panthor_coredump *cd;
+ int pm_active;
lockdep_assert_held(&ptdev->scheduler->lock);
@@ -3678,7 +3679,12 @@ static void panthor_sched_coredump_locked(struct panthor_device *ptdev,
if (!cd)
return;
+ pm_active = pm_runtime_get_if_active(ptdev->base.dev);
+
panthor_coredump_capture(cd, group);
+
+ if (pm_active == 1)
+ pm_runtime_put(ptdev->base.dev);
}
void panthor_group_capture_coredump(const struct panthor_group *group,
--
2.50.0.727.gbf7dc18ff4-goog
next prev parent reply other threads:[~2025-07-20 0:02 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-20 0:01 [PATCH 0/9] drm/panthor: add devcoredump support Chia-I Wu
2025-07-20 0:01 ` [PATCH 1/9] " Chia-I Wu
2025-07-20 3:17 ` kernel test robot
2025-07-28 11:24 ` Steven Price
2025-08-21 8:16 ` Boris Brezillon
2025-07-20 0:01 ` Chia-I Wu [this message]
2025-07-20 4:29 ` [PATCH 2/9] drm/panthor: capture GPU state for devcoredump kernel test robot
2025-07-20 0:01 ` [PATCH 3/9] drm/panthor: capture GLB " Chia-I Wu
2025-07-20 5:41 ` kernel test robot
2025-07-20 0:01 ` [PATCH 4/9] drm/panthor: capture CSG " Chia-I Wu
2025-07-20 0:01 ` [PATCH 5/9] drm/panthor: capture CS " Chia-I Wu
2025-07-20 0:01 ` [PATCH 6/9] drm/panthor: capture AS " Chia-I Wu
2025-07-20 0:01 ` [PATCH 7/9] drm/panthor: capture VMA " Chia-I Wu
2025-07-20 0:01 ` [PATCH 8/9] drm/panthor: check bo offset alignment in vm bind Chia-I Wu
2025-08-21 7:33 ` Boris Brezillon
2025-07-20 0:01 ` [PATCH 9/9] drm/panthor: add DRM_PANTHOR_VM_BIND_OP_MAP_DUMPABLE Chia-I Wu
2025-08-21 7:55 ` Boris Brezillon
2025-07-20 0:41 ` [PATCH 0/9] drm/panthor: add devcoredump support Daniel Almeida
2025-07-20 1:13 ` Chia-I Wu
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