Re: [PATCH] x86/CPU/AMD: Ignore invalid reset reason value

[Yazen Ghannam <yazen.ghannam@amd.com>]

On Tue, Jul 22, 2025 at 06:56:15PM +0200, Borislav Petkov wrote:
> On Mon, Jul 21, 2025 at 06:11:54PM +0000, Yazen Ghannam wrote:
> > The reset reason value may be "all bits set", e.g. 0xFFFFFFFF. This is a
> > commonly used error response from hardware. This may occur due to a real
> > hardware issue or when running in a VM.
> 
> Well, which is it Libing is reporting? VM or a real hw issue?
> 

In this case, it was a VM.

> If it is a VM, is that -1 the only thing a VMM returns when reading that
> MMIO address or can it be anything?
> 
> If latter, you need to check X86_FEATURE_HYPERVISOR.
> 
> Same for a real hw issue.
> 
> IOW, is -1 the *only* invalid data we can read here or are we playing
> whack-a-mole with it?
> 

I see you're point, but I don't think we can know for sure all possible
cases. There are some reserved bits that shouldn't be set. But these
definitions could change in the future.

And it'd be a pain to try and verify combinations of bits and configs.
Like can bit A and B be set together, or can bit C be set while running
in a VM, or can bit D ever be set on Model Z? 

The -1 (all bits set) is the only "applies to all cases" invalid data,
since this is a common hardware error response. So we can at least check
for this.

Thanks,
Yazen