From: Aleksa Paunovic via B4 Relay <devnull+aleksa.paunovic.htecgroup.com@kernel.org>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Jonathan Corbet <corbet@lwn.net>
Cc: Palmer Dabbelt <palmer@sifive.com>,
Conor Dooley <conor@kernel.org>,
Djordje Todorovic <djordje.todorovic@htecgroup.com>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
Aleksa Paunovic <aleksa.paunovic@htecgroup.com>,
Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH v5 1/7] dt-bindings: riscv: Add xmipsexectl ISA extension description
Date: Thu, 24 Jul 2025 17:23:25 +0200 [thread overview]
Message-ID: <20250724-p8700-pause-v5-1-a6cbbe1c3412@htecgroup.com> (raw)
In-Reply-To: <20250724-p8700-pause-v5-0-a6cbbe1c3412@htecgroup.com>
From: Aleksa Paunovic <aleksa.paunovic@htecgroup.com>
The xmipsexectl extension is described in the MIPS RV64 P8700/P8700-F
Multiprocessing System Programmer’s Guide linked at [1].
Link: https://mips.com/wp-content/uploads/2025/06/P8700_Programmers_Reference_Manual_Rev1.84_5-31-2025.pdf
Signed-off-by: Aleksa Paunovic <aleksa.paunovic@htecgroup.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index ede6a58ccf5347d92785dc085a011052c1aade14..de41a6f074d3af2ceaf5293dfe75d16f43d416d6 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -662,6 +662,12 @@ properties:
Registers in the AX45MP datasheet.
https://www.andestech.com/wp-content/uploads/AX45MP-1C-Rev.-5.0.0-Datasheet.pdf
+ # MIPS
+ - const: xmipsexectl
+ description:
+ The MIPS extension for execution control as documented in
+ https://mips.com/wp-content/uploads/2025/06/P8700_Programmers_Reference_Manual_Rev1.84_5-31-2025.pdf
+
# SiFive
- const: xsfvqmaccdod
description:
--
2.34.1
next prev parent reply other threads:[~2025-07-24 15:23 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-24 15:23 [PATCH v5 0/7] riscv: Add support for xmipsexectl Aleksa Paunovic via B4 Relay
2025-07-24 15:23 ` Aleksa Paunovic via B4 Relay [this message]
2025-07-24 15:23 ` [PATCH v5 2/7] riscv: Add xmipsexectl as a vendor extension Aleksa Paunovic via B4 Relay
2025-07-24 15:23 ` [PATCH v5 3/7] riscv: Add xmipsexectl instructions Aleksa Paunovic via B4 Relay
2025-07-24 15:23 ` [PATCH v5 4/7] riscv: hwprobe: Add MIPS vendor extension probing Aleksa Paunovic via B4 Relay
2025-07-24 15:23 ` [PATCH v5 5/7] riscv: hwprobe: Document MIPS xmipsexectl vendor extension Aleksa Paunovic via B4 Relay
2025-07-24 15:23 ` [PATCH v5 6/7] riscv: Add tools support for xmipsexectl Aleksa Paunovic via B4 Relay
2025-07-24 15:23 ` [PATCH v5 7/7] riscv: errata: Fix the PAUSE Opcode for MIPS P8700 Aleksa Paunovic via B4 Relay
2025-07-31 13:36 ` [PATCH v5 0/7] riscv: Add support for xmipsexectl Alexandre Ghiti
2025-08-01 16:40 ` Aleksa Paunovic
2025-08-06 17:15 ` patchwork-bot+linux-riscv
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