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From: Laura Nao <laura.nao@collabora.com>
To: srini@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, rafael@kernel.org,
	daniel.lezcano@linaro.org, rui.zhang@intel.com,
	lukasz.luba@arm.com, matthias.bgg@gmail.com,
	angelogioacchino.delregno@collabora.com
Cc: nfraprado@collabora.com, arnd@arndb.de, colin.i.king@gmail.com,
	u.kleine-koenig@baylibre.com, andrew-ct.chen@mediatek.com,
	lala.lin@mediatek.com, bchihi@baylibre.com,
	frank-w@public-files.de, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, kernel@collabora.com,
	Laura Nao <laura.nao@collabora.com>
Subject: [PATCH v3 7/9] thermal/drivers/mediatek/lvts: Support MSR offset for 16-bit calibration data
Date: Mon,  4 Aug 2025 15:30:33 +0200	[thread overview]
Message-ID: <20250804133035.309990-8-laura.nao@collabora.com> (raw)
In-Reply-To: <20250804133035.309990-1-laura.nao@collabora.com>

On MT8196/MT6991, per-sensor calibration data read from eFuses is
16-bit. When the LVTS controller operates in 16-bit mode, a fixed offset
must be added to MSR values during post-processing to obtain correct
temperature readings. Introduce a new msr_offset field in lvts_data,
program the respective register and apply the offset to the calibration
data read from eFuses.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Laura Nao <laura.nao@collabora.com>
---
 drivers/thermal/mediatek/lvts_thermal.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c
index dcfcb1be5a09..481ca133902d 100644
--- a/drivers/thermal/mediatek/lvts_thermal.c
+++ b/drivers/thermal/mediatek/lvts_thermal.c
@@ -44,6 +44,7 @@
 #define LVTS_EDATA01(__base)	(__base + 0x0058)
 #define LVTS_EDATA02(__base)	(__base + 0x005C)
 #define LVTS_EDATA03(__base)	(__base + 0x0060)
+#define LVTS_MSROFT(__base)		(__base + 0x006C)
 #define LVTS_ATP0(__base)		(__base + 0x0070)
 #define LVTS_ATP1(__base)		(__base + 0x0074)
 #define LVTS_ATP2(__base)		(__base + 0x0078)
@@ -150,6 +151,7 @@ struct lvts_data {
 	int temp_offset;
 	int gt_calib_bit_offset;
 	unsigned int def_calibration;
+	u16 msr_offset;
 };
 
 struct lvts_sensor {
@@ -218,6 +220,7 @@ static const struct debugfs_reg32 lvts_regs[] = {
 	LVTS_DEBUG_FS_REGS(LVTS_EDATA01),
 	LVTS_DEBUG_FS_REGS(LVTS_EDATA02),
 	LVTS_DEBUG_FS_REGS(LVTS_EDATA03),
+	LVTS_DEBUG_FS_REGS(LVTS_MSROFT),
 	LVTS_DEBUG_FS_REGS(LVTS_ATP0),
 	LVTS_DEBUG_FS_REGS(LVTS_ATP1),
 	LVTS_DEBUG_FS_REGS(LVTS_ATP2),
@@ -788,6 +791,8 @@ static int lvts_calibration_init(struct device *dev, struct lvts_ctrl *lvts_ctrl
 
 		if (gt) {
 			lvts_ctrl->calibration[i] = calib;
+			if (lvts_ctrl->lvts_data->msr_offset)
+				lvts_ctrl->calibration[i] += lvts_ctrl->lvts_data->msr_offset;
 		} else if (lvts_ctrl->lvts_data->def_calibration) {
 			lvts_ctrl->calibration[i] = lvts_ctrl->lvts_data->def_calibration;
 		} else {
@@ -1095,6 +1100,17 @@ static int lvts_ctrl_calibrate(struct device *dev, struct lvts_ctrl *lvts_ctrl)
 	for (i = 0; i < LVTS_SENSOR_MAX; i++)
 		writel(lvts_ctrl->calibration[i], lvts_edata[i]);
 
+	/* LVTS_MSROFT : Constant offset applied to MSR values
+	 * for post-processing
+	 *
+	 * Bits:
+	 *
+	 * 20-0 : Constant data added to MSR values
+	 */
+	if (lvts_ctrl->lvts_data->msr_offset)
+		writel(lvts_ctrl->lvts_data->msr_offset,
+		       LVTS_MSROFT(lvts_ctrl->base));
+
 	return 0;
 }
 
-- 
2.39.5


  parent reply	other threads:[~2025-08-04 13:32 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-04 13:30 [PATCH v3 0/9] Add thermal sensor driver support for Mediatek MT8196 Laura Nao
2025-08-04 13:30 ` [PATCH v3 1/9] dt-bindings: thermal: mediatek: Add LVTS thermal controller support for MT8196 Laura Nao
2025-08-04 13:30 ` [PATCH v3 2/9] thermal/drivers/mediatek/lvts: Make number of calibration offsets configurable Laura Nao
2025-08-04 13:30 ` [PATCH v3 3/9] thermal/drivers/mediatek/lvts: Guard against zero temp_factor in lvts_raw_to_temp Laura Nao
2025-08-04 13:30 ` [PATCH v3 4/9] thermal: mediatek: lvts: Add platform ops to support alternative conversion logic Laura Nao
2025-08-04 13:30 ` [PATCH v3 5/9] thermal/drivers/mediatek/lvts: Add lvts_temp_to_raw variant Laura Nao
2025-08-04 13:30 ` [PATCH v3 6/9] thermal/drivers/mediatek/lvts: Add support for ATP mode Laura Nao
2025-08-04 13:30 ` Laura Nao [this message]
2025-08-04 13:30 ` [PATCH v3 8/9] thermal/drivers/mediatek/lvts_thermal: Add MT8196 support Laura Nao
2025-08-04 13:30 ` [PATCH v3 9/9] dt-bindings: nvmem: mediatek: efuse: Add support for MT8196 Laura Nao
2025-08-05 17:17   ` Rob Herring (Arm)
2025-09-24 11:11 ` [PATCH v3 0/9] Add thermal sensor driver support for Mediatek MT8196 AngeloGioacchino Del Regno
2025-10-02 12:57 ` Laura Nao

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